changeset 14029d75688d in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=14029d75688d
description:
mem: fix bug in packet access endianness changes
The new Packet::setRaw() method incorrectly still contained
an htog() conversion. As a result, calls to the old set()
method (now defined as setRaw(htog(v))) underwent two htog
conversions, which breaks things when htog() is not a no-op.
Interestingly the only test that caught this was a SPARC
boot test, where an IsaFake device with a non-zero return
value was getting swapped twice resulting in a register
getting loaded with 0x100000000000000 instead of 1.
(Good reason for keeping SPARC around, perhaps?)
diffstat:
src/mem/packet_access.hh | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diffs (12 lines):
diff -r a368064a2ab5 -r 14029d75688d src/mem/packet_access.hh
--- a/src/mem/packet_access.hh Mon Jan 11 05:52:20 2016 -0500
+++ b/src/mem/packet_access.hh Mon Jan 11 16:20:38 2016 -0500
@@ -66,7 +66,7 @@
{
assert(flags.isSet(STATIC_DATA|DYNAMIC_DATA));
assert(sizeof(T) <= size);
- *(T*)data = TheISA::htog(v);
+ *(T*)data = v;
}
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