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Review request for Default. Repository: gem5 Description ------- Changeset 11313:0614d64714a8 --------------------------- arm: Implement store-pair (aarch64) as a single micro-op Previous implementation cracked store-pair into two micro-ops, which forbade corresponding load-pair (one micro-op) to benefit from STLF. This could cause many unecessary stalls and replays of load-pairs. Note that this only changes regular store-pair. FP store-pairs are still cracked (and they probably should match the regular store-pair implementation). Diffs ----- src/arch/arm/insts/macromem.cc 3d7a85d71bd1 src/arch/arm/isa/insts/ldr64.isa 3d7a85d71bd1 src/arch/arm/isa/insts/str64.isa 3d7a85d71bd1 Diff: http://reviews.gem5.org/r/3298/diff/ Testing ------- FS: Boots linux (3.16) SE: Runs olden benchmarks Thanks, Arthur Perais _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
