changeset b51a72edfcff in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=b51a72edfcff description: stats: update EIO stats for recent changes
diffstat: tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simerr | 5 + tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simout | 14 +- tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt | 152 + tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simerr | 5 + tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout | 14 +- tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt | 506 +++ tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr | 7 + tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout | 20 +- tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt | 1109 ++++++ tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr | 8 + tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout | 20 +- tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt | 1661 ++++++++++ 12 files changed, 3501 insertions(+), 20 deletions(-) diffs (truncated from 3585 to 300 lines): diff -r 10647f5d0f7f -r b51a72edfcff tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simerr --- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simerr Thu Feb 04 16:57:59 2016 -0600 +++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simerr Sat Feb 06 01:35:03 2016 -0500 @@ -0,0 +1,5 @@ +warn: Sockets disabled, not accepting gdb connections +warn: Prefetch instructions in Alpha do not do anything +warn: Prefetch instructions in Alpha do not do anything + +gzip: stdout: Broken pipe diff -r 10647f5d0f7f -r b51a72edfcff tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simout --- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simout Thu Feb 04 16:57:59 2016 -0600 +++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simout Sat Feb 06 01:35:03 2016 -0500 @@ -1,9 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 21 2016 13:49:21 -gem5 started Jan 21 2016 13:50:02 -gem5 executing on zizzer, pid 33994 -command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic -re /z/atgutier/gem5/gem5-commit/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic +gem5 compiled Feb 1 2016 02:06:47 +gem5 started Feb 1 2016 02:07:02 +gem5 executing on zizzer, pid 44725 +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic -Skipping test: Test requires the 'EioProcess' SimObject. +Global frequency set at 1000000000000 ticks per second +info: Entering event queue @ 0. Starting simulation... +main dictionary has 1245 entries +49508 bytes wasted +>Exiting @ tick 250015500 because a thread reached the max instruction count diff -r 10647f5d0f7f -r b51a72edfcff tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt --- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt Thu Feb 04 16:57:59 2016 -0600 +++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt Sat Feb 06 01:35:03 2016 -0500 @@ -0,0 +1,152 @@ + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.000250 # Number of seconds simulated +sim_ticks 250015500 # Number of ticks simulated +final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_freq 1000000000000 # Frequency of simulated ticks +host_inst_rate 1689656 # Simulator instruction rate (inst/s) +host_op_rate 1689524 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 844754706 # Simulator tick rate (ticks/s) +host_mem_usage 219516 # Number of bytes of host memory used +host_seconds 0.30 # Real time elapsed on the host +sim_insts 500001 # Number of instructions simulated +sim_ops 500001 # Number of ops (including micro ops) simulated +system.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1000 # Clock period in ticks +system.physmem.bytes_read::cpu.inst 2000076 # Number of bytes read from this memory +system.physmem.bytes_read::cpu.data 872600 # Number of bytes read from this memory +system.physmem.bytes_read::total 2872676 # Number of bytes read from this memory +system.physmem.bytes_inst_read::cpu.inst 2000076 # Number of instructions bytes read from this memory +system.physmem.bytes_inst_read::total 2000076 # Number of instructions bytes read from this memory +system.physmem.bytes_written::cpu.data 417562 # Number of bytes written to this memory +system.physmem.bytes_written::total 417562 # Number of bytes written to this memory +system.physmem.num_reads::cpu.inst 500019 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu.data 124435 # Number of read requests responded to by this memory +system.physmem.num_reads::total 624454 # Number of read requests responded to by this memory +system.physmem.num_writes::cpu.data 56340 # Number of write requests responded to by this memory +system.physmem.num_writes::total 56340 # Number of write requests responded to by this memory +system.physmem.bw_read::cpu.inst 7999808012 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.data 3490183609 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::total 11489991621 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu.inst 7999808012 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::total 7999808012 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_write::cpu.data 1670144451 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_write::total 1670144451 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total::cpu.inst 7999808012 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.data 5160328060 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::total 13160136072 # Total bandwidth to/from this memory (bytes/s) +system.cpu_clk_domain.clock 500 # Clock period in ticks +system.cpu.dtb.fetch_hits 0 # ITB hits +system.cpu.dtb.fetch_misses 0 # ITB misses +system.cpu.dtb.fetch_acv 0 # ITB acv +system.cpu.dtb.fetch_accesses 0 # ITB accesses +system.cpu.dtb.read_hits 124435 # DTB read hits +system.cpu.dtb.read_misses 8 # DTB read misses +system.cpu.dtb.read_acv 0 # DTB read access violations +system.cpu.dtb.read_accesses 124443 # DTB read accesses +system.cpu.dtb.write_hits 56340 # DTB write hits +system.cpu.dtb.write_misses 10 # DTB write misses +system.cpu.dtb.write_acv 0 # DTB write access violations +system.cpu.dtb.write_accesses 56350 # DTB write accesses +system.cpu.dtb.data_hits 180775 # DTB hits +system.cpu.dtb.data_misses 18 # DTB misses +system.cpu.dtb.data_acv 0 # DTB access violations +system.cpu.dtb.data_accesses 180793 # DTB accesses +system.cpu.itb.fetch_hits 500019 # ITB hits +system.cpu.itb.fetch_misses 13 # ITB misses +system.cpu.itb.fetch_acv 0 # ITB acv +system.cpu.itb.fetch_accesses 500032 # ITB accesses +system.cpu.itb.read_hits 0 # DTB read hits +system.cpu.itb.read_misses 0 # DTB read misses +system.cpu.itb.read_acv 0 # DTB read access violations +system.cpu.itb.read_accesses 0 # DTB read accesses +system.cpu.itb.write_hits 0 # DTB write hits +system.cpu.itb.write_misses 0 # DTB write misses +system.cpu.itb.write_acv 0 # DTB write access violations +system.cpu.itb.write_accesses 0 # DTB write accesses +system.cpu.itb.data_hits 0 # DTB hits +system.cpu.itb.data_misses 0 # DTB misses +system.cpu.itb.data_acv 0 # DTB access violations +system.cpu.itb.data_accesses 0 # DTB accesses +system.cpu.workload.num_syscalls 18 # Number of system calls +system.cpu.numCycles 500032 # number of cpu cycles simulated +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.committedInsts 500001 # Number of instructions committed +system.cpu.committedOps 500001 # Number of ops (including micro ops) committed +system.cpu.num_int_alu_accesses 474689 # Number of integer alu accesses +system.cpu.num_fp_alu_accesses 32 # Number of float alu accesses +system.cpu.num_func_calls 14357 # number of times a function call or return occured +system.cpu.num_conditional_control_insts 38180 # number of instructions that are conditional controls +system.cpu.num_int_insts 474689 # number of integer instructions +system.cpu.num_fp_insts 32 # number of float instructions +system.cpu.num_int_register_reads 654286 # number of times the integer registers were read +system.cpu.num_int_register_writes 371542 # number of times the integer registers were written +system.cpu.num_fp_register_reads 32 # number of times the floating registers were read +system.cpu.num_fp_register_writes 16 # number of times the floating registers were written +system.cpu.num_mem_refs 180793 # number of memory refs +system.cpu.num_load_insts 124443 # Number of load instructions +system.cpu.num_store_insts 56350 # Number of store instructions +system.cpu.num_idle_cycles 0 # Number of idle cycles +system.cpu.num_busy_cycles 500032 # Number of busy cycles +system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles +system.cpu.idle_fraction 0 # Percentage of idle cycles +system.cpu.Branches 59023 # Number of branches fetched +system.cpu.op_class::No_OpClass 18814 3.76% 3.76% # Class of executed instruction +system.cpu.op_class::IntAlu 300388 60.08% 63.84% # Class of executed instruction +system.cpu.op_class::IntMult 10 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::IntDiv 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::FloatAdd 10 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::FloatCmp 2 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::FloatCvt 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::FloatMult 2 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::FloatDiv 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::FloatSqrt 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdAdd 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdAddAcc 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdAlu 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdCmp 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdCvt 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdMisc 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdMult 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdMultAcc 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdShift 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdShiftAcc 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdSqrt 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdFloatAdd 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdFloatAlu 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdFloatCmp 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdFloatCvt 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdFloatDiv 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdFloatMisc 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdFloatMult 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::SimdFloatSqrt 0 0.00% 63.84% # Class of executed instruction +system.cpu.op_class::MemRead 124443 24.89% 88.73% # Class of executed instruction +system.cpu.op_class::MemWrite 56350 11.27% 100.00% # Class of executed instruction +system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::total 500019 # Class of executed instruction +system.membus.trans_dist::ReadReq 624454 # Transaction distribution +system.membus.trans_dist::ReadResp 624454 # Transaction distribution +system.membus.trans_dist::WriteReq 56340 # Transaction distribution +system.membus.trans_dist::WriteResp 56340 # Transaction distribution +system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 1000038 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 361550 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 1361588 # Packet count per connected master and slave (bytes) +system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 2000076 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 1290162 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size::total 3290238 # Cumulative packet size per connected master and slave (bytes) +system.membus.snoops 0 # Total snoops (count) +system.membus.snoop_fanout::samples 680794 # Request fanout histogram +system.membus.snoop_fanout::mean 0.734464 # Request fanout histogram +system.membus.snoop_fanout::stdev 0.441618 # Request fanout histogram +system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram +system.membus.snoop_fanout::0 180775 26.55% 26.55% # Request fanout histogram +system.membus.snoop_fanout::1 500019 73.45% 100.00% # Request fanout histogram +system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram +system.membus.snoop_fanout::min_value 0 # Request fanout histogram +system.membus.snoop_fanout::max_value 1 # Request fanout histogram +system.membus.snoop_fanout::total 680794 # Request fanout histogram + +---------- End Simulation Statistics ---------- diff -r 10647f5d0f7f -r b51a72edfcff tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simerr --- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simerr Thu Feb 04 16:57:59 2016 -0600 +++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simerr Sat Feb 06 01:35:03 2016 -0500 @@ -0,0 +1,5 @@ +warn: Sockets disabled, not accepting gdb connections +warn: Prefetch instructions in Alpha do not do anything +warn: Prefetch instructions in Alpha do not do anything + +gzip: stdout: Broken pipe diff -r 10647f5d0f7f -r b51a72edfcff tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout --- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout Thu Feb 04 16:57:59 2016 -0600 +++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout Sat Feb 06 01:35:03 2016 -0500 @@ -1,9 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 21 2016 13:49:21 -gem5 started Jan 21 2016 13:50:26 -gem5 executing on zizzer, pid 34075 -command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing -re /z/atgutier/gem5/gem5-commit/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing +gem5 compiled Feb 1 2016 02:06:47 +gem5 started Feb 1 2016 02:07:02 +gem5 executing on zizzer, pid 44728 +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing -Skipping test: Test requires the 'EioProcess' SimObject. +Global frequency set at 1000000000000 ticks per second +info: Entering event queue @ 0. Starting simulation... +main dictionary has 1245 entries +49508 bytes wasted +>Exiting @ tick 733071500 because a thread reached the max instruction count diff -r 10647f5d0f7f -r b51a72edfcff tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt --- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt Thu Feb 04 16:57:59 2016 -0600 +++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt Sat Feb 06 01:35:03 2016 -0500 @@ -0,0 +1,506 @@ + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.000733 # Number of seconds simulated +sim_ticks 733071500 # Number of ticks simulated +final_tick 733071500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_freq 1000000000000 # Frequency of simulated ticks +host_inst_rate 728390 # Simulator instruction rate (inst/s) +host_op_rate 728363 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1067851383 # Simulator tick rate (ticks/s) +host_mem_usage 229580 # Number of bytes of host memory used +host_seconds 0.69 # Real time elapsed on the host +sim_insts 500001 # Number of instructions simulated +sim_ops 500001 # Number of ops (including micro ops) simulated +system.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1000 # Clock period in ticks +system.physmem.bytes_read::cpu.inst 25792 # Number of bytes read from this memory +system.physmem.bytes_read::cpu.data 29056 # Number of bytes read from this memory +system.physmem.bytes_read::total 54848 # Number of bytes read from this memory +system.physmem.bytes_inst_read::cpu.inst 25792 # Number of instructions bytes read from this memory +system.physmem.bytes_inst_read::total 25792 # Number of instructions bytes read from this memory +system.physmem.num_reads::cpu.inst 403 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu.data 454 # Number of read requests responded to by this memory +system.physmem.num_reads::total 857 # Number of read requests responded to by this memory +system.physmem.bw_read::cpu.inst 35183471 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.data 39635970 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::total 74819441 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu.inst 35183471 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::total 35183471 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_total::cpu.inst 35183471 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.data 39635970 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::total 74819441 # Total bandwidth to/from this memory (bytes/s) +system.cpu_clk_domain.clock 500 # Clock period in ticks +system.cpu.dtb.fetch_hits 0 # ITB hits +system.cpu.dtb.fetch_misses 0 # ITB misses +system.cpu.dtb.fetch_acv 0 # ITB acv +system.cpu.dtb.fetch_accesses 0 # ITB accesses +system.cpu.dtb.read_hits 124435 # DTB read hits +system.cpu.dtb.read_misses 8 # DTB read misses +system.cpu.dtb.read_acv 0 # DTB read access violations +system.cpu.dtb.read_accesses 124443 # DTB read accesses +system.cpu.dtb.write_hits 56340 # DTB write hits +system.cpu.dtb.write_misses 10 # DTB write misses +system.cpu.dtb.write_acv 0 # DTB write access violations +system.cpu.dtb.write_accesses 56350 # DTB write accesses +system.cpu.dtb.data_hits 180775 # DTB hits +system.cpu.dtb.data_misses 18 # DTB misses +system.cpu.dtb.data_acv 0 # DTB access violations +system.cpu.dtb.data_accesses 180793 # DTB accesses +system.cpu.itb.fetch_hits 500020 # ITB hits +system.cpu.itb.fetch_misses 13 # ITB misses +system.cpu.itb.fetch_acv 0 # ITB acv +system.cpu.itb.fetch_accesses 500033 # ITB accesses +system.cpu.itb.read_hits 0 # DTB read hits +system.cpu.itb.read_misses 0 # DTB read misses +system.cpu.itb.read_acv 0 # DTB read access violations +system.cpu.itb.read_accesses 0 # DTB read accesses +system.cpu.itb.write_hits 0 # DTB write hits +system.cpu.itb.write_misses 0 # DTB write misses +system.cpu.itb.write_acv 0 # DTB write access violations +system.cpu.itb.write_accesses 0 # DTB write accesses +system.cpu.itb.data_hits 0 # DTB hits +system.cpu.itb.data_misses 0 # DTB misses +system.cpu.itb.data_acv 0 # DTB access violations +system.cpu.itb.data_accesses 0 # DTB accesses +system.cpu.workload.num_syscalls 18 # Number of system calls +system.cpu.numCycles 1466143 # number of cpu cycles simulated +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.committedInsts 500001 # Number of instructions committed +system.cpu.committedOps 500001 # Number of ops (including micro ops) committed +system.cpu.num_int_alu_accesses 474689 # Number of integer alu accesses +system.cpu.num_fp_alu_accesses 32 # Number of float alu accesses +system.cpu.num_func_calls 14357 # number of times a function call or return occured +system.cpu.num_conditional_control_insts 38180 # number of instructions that are conditional controls +system.cpu.num_int_insts 474689 # number of integer instructions +system.cpu.num_fp_insts 32 # number of float instructions +system.cpu.num_int_register_reads 654286 # number of times the integer registers were read +system.cpu.num_int_register_writes 371542 # number of times the integer registers were written _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
