changeset 31ca646c7685 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=31ca646c7685
description:
x86: create function to check miscreg validity
In the process of trying to get rid of an '== false' comparison,
it became apparent that a slightly more involved solution was
needed. Split this out into its own changeset since it's not
a totally trivial local change like the others.
diffstat:
src/arch/x86/isa.cc | 16 ++--------------
src/arch/x86/regs/misc.hh | 11 ++++++++++-
src/arch/x86/utility.cc | 6 ++----
3 files changed, 14 insertions(+), 19 deletions(-)
diffs (78 lines):
diff -r 98e8aa1585a7 -r 31ca646c7685 src/arch/x86/isa.cc
--- a/src/arch/x86/isa.cc Sat Feb 06 17:21:20 2016 -0800
+++ b/src/arch/x86/isa.cc Sat Feb 06 17:21:20 2016 -0800
@@ -129,13 +129,7 @@
// Make sure we're not dealing with an illegal control register.
// Instructions should filter out these indexes, and nothing else should
// attempt to read them directly.
- assert(miscReg >= MISCREG_CR0 &&
- miscReg < NUM_MISCREGS &&
- miscReg != MISCREG_CR1 &&
- !(miscReg > MISCREG_CR4 &&
- miscReg < MISCREG_CR8) &&
- !(miscReg > MISCREG_CR8 &&
- miscReg <= MISCREG_CR15));
+ assert(isValidMiscReg(miscReg));
return regVal[miscReg];
}
@@ -162,13 +156,7 @@
// Make sure we're not dealing with an illegal control register.
// Instructions should filter out these indexes, and nothing else should
// attempt to write to them directly.
- assert(miscReg >= MISCREG_CR0 &&
- miscReg < NUM_MISCREGS &&
- miscReg != MISCREG_CR1 &&
- !(miscReg > MISCREG_CR4 &&
- miscReg < MISCREG_CR8) &&
- !(miscReg > MISCREG_CR8 &&
- miscReg <= MISCREG_CR15));
+ assert(isValidMiscReg(miscReg));
HandyM5Reg m5Reg = readMiscRegNoEffect(MISCREG_M5_REG);
switch (miscReg) {
diff -r 98e8aa1585a7 -r 31ca646c7685 src/arch/x86/regs/misc.hh
--- a/src/arch/x86/regs/misc.hh Sat Feb 06 17:21:20 2016 -0800
+++ b/src/arch/x86/regs/misc.hh Sat Feb 06 17:21:20 2016 -0800
@@ -101,7 +101,7 @@
enum MiscRegIndex
{
// Control registers
- // Most of these are invalid.
+ // Most of these are invalid. See isValidMiscReg() below.
MISCREG_CR_BASE,
MISCREG_CR0 = MISCREG_CR_BASE,
MISCREG_CR1,
@@ -399,6 +399,15 @@
NUM_MISCREGS
};
+ static inline bool
+ isValidMiscReg(int index)
+ {
+ return (index >= MISCREG_CR0 && index < NUM_MISCREGS &&
+ index != MISCREG_CR1 &&
+ !(index > MISCREG_CR4 && index < MISCREG_CR8) &&
+ !(index > MISCREG_CR8 && index <= MISCREG_CR15));
+ }
+
static inline MiscRegIndex
MISCREG_CR(int index)
{
diff -r 98e8aa1585a7 -r 31ca646c7685 src/arch/x86/utility.cc
--- a/src/arch/x86/utility.cc Sat Feb 06 17:21:20 2016 -0800
+++ b/src/arch/x86/utility.cc Sat Feb 06 17:21:20 2016 -0800
@@ -217,11 +217,9 @@
// need to be considered while copying state. That will likely not be
// true in the future.
for (int i = 0; i < NUM_MISCREGS; ++i) {
- if ( ( i != MISCREG_CR1 &&
- !(i > MISCREG_CR4 && i < MISCREG_CR8) &&
- !(i > MISCREG_CR8 && i <= MISCREG_CR15) ) == false) {
+ if (!isValidMiscReg(i))
continue;
- }
+
dest->setMiscRegNoEffect(i, src->readMiscRegNoEffect(i));
}
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