-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/3428/
-----------------------------------------------------------

Review request for Default.


Repository: gem5


Description
-------

Changeset 11430:ad5965016b8e
---------------------------
ruby: pass in block size to ENTRY objects with block size


Diffs
-----

  src/mem/protocol/MOESI_CMP_token-L2cache.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_CMP_token-dir.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_hammer-cache.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_hammer-dir.sm cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/ruby/structures/TBETable.hh cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/slicc/symbols/Type.py cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_AMD_Base-L3cache.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_AMD_Base-Region-CorePair.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_AMD_Base-Region-dir.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_AMD_Base-RegionBuffer.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_AMD_Base-RegionDir.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_AMD_Base-dir.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_AMD_Base-probeFilter.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_CMP_directory-L1cache.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_CMP_directory-L2cache.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_CMP_directory-dir.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_CMP_directory-dma.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_CMP_token-L1cache.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/GPU_VIPER-TCP.sm cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/GPU_VIPER_Region-TCC.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MESI_Three_Level-L0cache.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MESI_Three_Level-L1cache.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MESI_Two_Level-L1cache.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MESI_Two_Level-L2cache.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MESI_Two_Level-dir.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MI_example-cache.sm cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MI_example-dir.sm cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/MOESI_AMD_Base-CorePair.sm 
cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/GPU_RfO-SQC.sm cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/GPU_RfO-TCC.sm cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/GPU_RfO-TCCdir.sm cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/GPU_RfO-TCP.sm cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/GPU_VIPER-SQC.sm cfad34a15729e1d5e096245f5a80ded6e2c379ca 
  src/mem/protocol/GPU_VIPER-TCC.sm cfad34a15729e1d5e096245f5a80ded6e2c379ca 

Diff: http://reviews.gem5.org/r/3428/diff/


Testing
-------


Thanks,

Brandon Potter

_______________________________________________
gem5-dev mailing list
gem5-dev@gem5.org
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to