[gem5-dev] changeset in gem5: sim: Fix clock_domain unserialization

[Sascha Bischoff]

changeset a10d9e2ef671 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a10d9e2ef671
description:
        sim: Fix clock_domain unserialization

        This patch addresses an issue with the unserialization of clock
        domains. Previously, the previous performance level was not restored
        due to a bug in the code, which detected the post-unserialize update
        as superfluous. This patch splits the setting of the clock domain into
        two parts. The original interface of perfLevel is retained, but the
        actual update takes place in signalPerfLevelUpdate, which is private
        to the class. The perfLevel method checks that if the new performance
        level is different to the previous performance level, and will only
        call signalPerfLevelUpdate if there is a change. Therefore, the
        performance level is only updated, and voltage domains notified, if
        there is an actual change. The split functionality allows
        signalPerfLevelUpdate to be called by startup() to explicitly force an
        update post unserialization.

diffstat:

 src/sim/clock_domain.cc |  7 ++++++-
 src/sim/clock_domain.hh |  5 +++++
 2 files changed, 11 insertions(+), 1 deletions(-)

diffs (39 lines):

diff -r d6c8016a9a03 -r a10d9e2ef671 src/sim/clock_domain.cc
--- a/src/sim/clock_domain.cc   Tue Apr 05 05:29:02 2016 -0500
+++ b/src/sim/clock_domain.cc   Fri Apr 01 16:22:44 2016 +0100
@@ -147,6 +147,11 @@
 
     _perfLevel = perf_level;
 
+    signalPerfLevelUpdate();
+}
+
+void SrcClockDomain::signalPerfLevelUpdate()
+{
     // Signal the voltage domain that we have changed our perf level so that 
the
     // voltage domain can recompute its performance level
     voltageDomain()->sanitiseVoltages();
@@ -174,7 +179,7 @@
 {
     // Perform proper clock update when all related components have been
     // created (i.e. after unserialization / object creation)
-    perfLevel(_perfLevel);
+    signalPerfLevelUpdate();
 }
 
 SrcClockDomain *
diff -r d6c8016a9a03 -r a10d9e2ef671 src/sim/clock_domain.hh
--- a/src/sim/clock_domain.hh   Tue Apr 05 05:29:02 2016 -0500
+++ b/src/sim/clock_domain.hh   Fri Apr 01 16:22:44 2016 +0100
@@ -244,6 +244,11 @@
 
   private:
     /**
+     * Inform other components about the changed performance level
+     */
+    void signalPerfLevelUpdate();
+
+    /**
       * List of possible frequency operational points, should be in
       * descending order
       * An empty list corresponds to default frequency specified for its
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