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http://reviews.gem5.org/r/3457/
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Review request for Default.


Repository: gem5


Description
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Changeset 11464:810b3115a5d6
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arch, cpu: Architectural Register structural indexing

Replace the unified register mapping by a structure
associating a class and an index. It is now much
easier to know which class of register the index is refering to.
Also, when adding a new class there is no need to modify
existing ones.

Change-Id: I55b3ac80763702aa2cd3ed2cbff0a75ef7620373
Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com>


Diffs
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  src/cpu/o3/rob.hh d9e32a851e2e 
  src/cpu/reg_class.hh d9e32a851e2e 
  src/cpu/reg_class.cc d9e32a851e2e 
  src/cpu/simple/exec_context.hh d9e32a851e2e 
  src/cpu/static_inst.hh d9e32a851e2e 
  src/cpu/thread_context.hh d9e32a851e2e 
  src/cpu/timing_expr.cc d9e32a851e2e 
  src/arch/sparc/isa/formats/mem/util.isa d9e32a851e2e 
  src/arch/sparc/isa/formats/priv.isa d9e32a851e2e 
  src/arch/sparc/registers.hh d9e32a851e2e 
  src/arch/x86/insts/microfpop.hh d9e32a851e2e 
  src/arch/x86/insts/microldstop.hh d9e32a851e2e 
  src/arch/x86/insts/micromediaop.hh d9e32a851e2e 
  src/arch/x86/insts/microregop.hh d9e32a851e2e 
  src/arch/x86/insts/static_inst.hh d9e32a851e2e 
  src/arch/x86/insts/static_inst.cc d9e32a851e2e 
  src/arch/x86/isa/microops/limmop.isa d9e32a851e2e 
  src/arch/x86/isa/specialize.isa d9e32a851e2e 
  src/arch/x86/registers.hh d9e32a851e2e 
  src/cpu/base_dyn_inst.hh d9e32a851e2e 
  src/cpu/checker/cpu.hh d9e32a851e2e 
  src/cpu/checker/cpu_impl.hh d9e32a851e2e 
  src/cpu/exec_context.hh d9e32a851e2e 
  src/cpu/minor/dyn_inst.hh d9e32a851e2e 
  src/cpu/minor/dyn_inst.cc d9e32a851e2e 
  src/cpu/minor/exec_context.hh d9e32a851e2e 
  src/cpu/minor/scoreboard.hh d9e32a851e2e 
  src/cpu/minor/scoreboard.cc d9e32a851e2e 
  src/cpu/o3/cpu.cc d9e32a851e2e 
  src/cpu/o3/dyn_inst.hh d9e32a851e2e 
  src/cpu/o3/dyn_inst_impl.hh d9e32a851e2e 
  src/cpu/o3/probe/elastic_trace.cc d9e32a851e2e 
  src/cpu/o3/rename.hh d9e32a851e2e 
  src/cpu/o3/rename_impl.hh d9e32a851e2e 
  src/cpu/o3/rename_map.hh d9e32a851e2e 
  src/cpu/o3/rename_map.cc d9e32a851e2e 
  src/arch/power/insts/static_inst.hh d9e32a851e2e 
  src/arch/power/insts/static_inst.cc d9e32a851e2e 
  src/arch/power/registers.hh d9e32a851e2e 
  src/arch/sparc/isa/base.isa d9e32a851e2e 
  src/arch/sparc/isa/formats/integerop.isa d9e32a851e2e 
  src/arch/arm/insts/vfp.cc d9e32a851e2e 
  src/arch/arm/registers.hh d9e32a851e2e 
  src/arch/generic/types.hh d9e32a851e2e 
  src/arch/isa_parser.py d9e32a851e2e 
  src/arch/mips/isa/base.isa d9e32a851e2e 
  src/arch/mips/isa/decoder.isa d9e32a851e2e 
  src/arch/mips/isa/formats/int.isa d9e32a851e2e 
  src/arch/mips/isa/formats/mt.isa d9e32a851e2e 
  src/arch/mips/mt.hh d9e32a851e2e 
  src/arch/mips/registers.hh d9e32a851e2e 
  src/arch/null/registers.hh d9e32a851e2e 
  src/arch/power/insts/branch.cc d9e32a851e2e 
  src/arch/arm/insts/macromem.cc d9e32a851e2e 
  src/arch/arm/insts/mem.hh d9e32a851e2e 
  src/arch/arm/insts/mem.cc d9e32a851e2e 
  src/arch/arm/insts/mem64.cc d9e32a851e2e 
  src/arch/arm/insts/misc.cc d9e32a851e2e 
  src/arch/arm/insts/misc64.cc d9e32a851e2e 
  src/arch/arm/insts/static_inst.hh d9e32a851e2e 
  src/arch/arm/insts/static_inst.cc d9e32a851e2e 
  src/arch/alpha/isa/branch.isa d9e32a851e2e 
  src/arch/alpha/isa/fp.isa d9e32a851e2e 
  src/arch/alpha/isa/main.isa d9e32a851e2e 
  src/arch/alpha/registers.hh d9e32a851e2e 
  src/arch/arm/insts/branch64.cc d9e32a851e2e 
  src/arch/arm/insts/data64.cc d9e32a851e2e 

Diff: http://reviews.gem5.org/r/3457/diff/


Testing
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Thanks,

Andreas Sandberg

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