changeset 2af4c6a4f3f5 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=2af4c6a4f3f5
description:
arm,dev: PL011 UART_FR read status enhancement
Given we do not simulate a FIFO currently there are only two states
we can be in upon read: empty or full. Properly signal the latter.
Add and sort constants for states in the header file.
Committed by Jason Lowe-Power <[email protected]>
diffstat:
src/dev/arm/pl011.cc | 3 ++-
src/dev/arm/pl011.hh | 4 +++-
2 files changed, 5 insertions(+), 2 deletions(-)
diffs (28 lines):
diff -r 8b23edf06cd3 -r 2af4c6a4f3f5 src/dev/arm/pl011.cc
--- a/src/dev/arm/pl011.cc Thu May 19 15:19:35 2016 -0500
+++ b/src/dev/arm/pl011.cc Thu May 19 15:19:35 2016 -0500
@@ -91,7 +91,8 @@
case UART_FR:
data =
UART_FR_CTS | // Clear To Send
- (!term->dataAvailable() ? UART_FR_RXFE : 0) | // RX FIFO Empty
+ // Given we do not simulate a FIFO we are either empty or full.
+ (!term->dataAvailable() ? UART_FR_RXFE : UART_FR_RXFF) |
UART_FR_TXFE; // TX FIFO empty
DPRINTF(Uart,
diff -r 8b23edf06cd3 -r 2af4c6a4f3f5 src/dev/arm/pl011.hh
--- a/src/dev/arm/pl011.hh Thu May 19 15:19:35 2016 -0500
+++ b/src/dev/arm/pl011.hh Thu May 19 15:19:35 2016 -0500
@@ -120,8 +120,10 @@
static const int UART_DR = 0x000;
static const int UART_FR = 0x018;
static const int UART_FR_CTS = 0x001;
+ static const int UART_FR_RXFE = 0x010;
+ static const int UART_FR_TXFF = 0x020;
+ static const int UART_FR_RXFF = 0x040;
static const int UART_FR_TXFE = 0x080;
- static const int UART_FR_RXFE = 0x010;
static const int UART_IBRD = 0x024;
static const int UART_FBRD = 0x028;
static const int UART_LCRH = 0x02C;
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev