changeset 5b81895e5d5e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=5b81895e5d5e
description:
pwr: Low-power idle power state for idle CPUs
Add functionality to the BaseCPU that will put the entire CPU
into a low-power idle state whenever all threads in it are idle.
Change-Id: I984d1656eb0a4863c87ceacd773d2d10de5cfd2b
diffstat:
src/cpu/base.cc | 29 ++++++++++++++++++++++++++++-
src/cpu/base.hh | 5 +++--
src/cpu/minor/cpu.cc | 4 ++++
src/cpu/o3/cpu.cc | 4 ++++
src/cpu/simple/atomic.cc | 3 +++
src/cpu/simple/timing.cc | 4 ++++
6 files changed, 46 insertions(+), 3 deletions(-)
diffs (158 lines):
diff -r 00ed0c11f4a3 -r 5b81895e5d5e src/cpu/base.cc
--- a/src/cpu/base.cc Mon Jun 06 17:16:43 2016 +0100
+++ b/src/cpu/base.cc Mon Jun 06 17:16:43 2016 +0100
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011-2012 ARM Limited
+ * Copyright (c) 2011-2012,2016 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -64,6 +64,7 @@
#include "debug/SyscallVerbose.hh"
#include "mem/page_table.hh"
#include "params/BaseCPU.hh"
+#include "sim/clocked_object.hh"
#include "sim/full_system.hh"
#include "sim/process.hh"
#include "sim/sim_events.hh"
@@ -355,6 +356,11 @@
if (params()->progress_interval) {
new CPUProgressEvent(this, params()->progress_interval);
}
+
+ // Assumption CPU start to operate instantaneously without any latency
+ if (ClockedObject::pwrState() == Enums::PwrState::UNDEFINED)
+ ClockedObject::pwrState(Enums::PwrState::ON);
+
}
ProbePoints::PMUUPtr
@@ -475,6 +481,27 @@
}
void
+BaseCPU::activateContext(ThreadID thread_num)
+{
+ // For any active thread running, update CPU power state to active (ON)
+ ClockedObject::pwrState(Enums::PwrState::ON);
+}
+
+void
+BaseCPU::suspendContext(ThreadID thread_num)
+{
+ // Check if all threads are suspended
+ for (auto t : threadContexts) {
+ if (t->status() != ThreadContext::Suspended) {
+ return;
+ }
+ }
+
+ // All CPU threads suspended, enter lower power state for the CPU
+ ClockedObject::pwrState(Enums::PwrState::CLK_GATED);
+}
+
+void
BaseCPU::switchOut()
{
assert(!_switchedOut);
diff -r 00ed0c11f4a3 -r 5b81895e5d5e src/cpu/base.hh
--- a/src/cpu/base.hh Mon Jun 06 17:16:43 2016 +0100
+++ b/src/cpu/base.hh Mon Jun 06 17:16:43 2016 +0100
@@ -279,10 +279,11 @@
Trace::InstTracer * getTracer() { return tracer; }
/// Notify the CPU that the indicated context is now active.
- virtual void activateContext(ThreadID thread_num) {}
+ virtual void activateContext(ThreadID thread_num);
/// Notify the CPU that the indicated context is now suspended.
- virtual void suspendContext(ThreadID thread_num) {}
+ /// Check if possible to enter a lower power state
+ virtual void suspendContext(ThreadID thread_num);
/// Notify the CPU that the indicated context is now halted.
virtual void haltContext(ThreadID thread_num) {}
diff -r 00ed0c11f4a3 -r 5b81895e5d5e src/cpu/minor/cpu.cc
--- a/src/cpu/minor/cpu.cc Mon Jun 06 17:16:43 2016 +0100
+++ b/src/cpu/minor/cpu.cc Mon Jun 06 17:16:43 2016 +0100
@@ -290,6 +290,8 @@
threads[thread_id]->activate();
wakeupOnEvent(Minor::Pipeline::CPUStageId);
pipeline->wakeupFetch();
+
+ BaseCPU::activateContext(thread_id);
}
void
@@ -298,6 +300,8 @@
DPRINTF(MinorCPU, "SuspendContext %d\n", thread_id);
threads[thread_id]->suspend();
+
+ BaseCPU::suspendContext(thread_id);
}
void
diff -r 00ed0c11f4a3 -r 5b81895e5d5e src/cpu/o3/cpu.cc
--- a/src/cpu/o3/cpu.cc Mon Jun 06 17:16:43 2016 +0100
+++ b/src/cpu/o3/cpu.cc Mon Jun 06 17:16:43 2016 +0100
@@ -735,6 +735,8 @@
lastActivatedCycle = curTick();
_status = Running;
+
+ BaseCPU::activateContext(tid);
}
}
@@ -755,6 +757,8 @@
}
DPRINTF(Quiesce, "Suspending Context\n");
+
+ BaseCPU::suspendContext(tid);
}
template <class Impl>
diff -r 00ed0c11f4a3 -r 5b81895e5d5e src/cpu/simple/atomic.cc
--- a/src/cpu/simple/atomic.cc Mon Jun 06 17:16:43 2016 +0100
+++ b/src/cpu/simple/atomic.cc Mon Jun 06 17:16:43 2016 +0100
@@ -247,6 +247,8 @@
== activeThreads.end()) {
activeThreads.push_back(thread_num);
}
+
+ BaseCPU::activateContext(thread_num);
}
@@ -273,6 +275,7 @@
}
}
+ BaseCPU::suspendContext(thread_num);
}
diff -r 00ed0c11f4a3 -r 5b81895e5d5e src/cpu/simple/timing.cc
--- a/src/cpu/simple/timing.cc Mon Jun 06 17:16:43 2016 +0100
+++ b/src/cpu/simple/timing.cc Mon Jun 06 17:16:43 2016 +0100
@@ -218,6 +218,8 @@
== activeThreads.end()) {
activeThreads.push_back(thread_num);
}
+
+ BaseCPU::activateContext(thread_num);
}
@@ -243,6 +245,8 @@
deschedule(fetchEvent);
}
}
+
+ BaseCPU::suspendContext(thread_num);
}
bool
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