changeset 37b0af2c7ba8 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=37b0af2c7ba8
description:
ext: eliminate warnings in SST connector
Now compiles completely clean.
diffstat:
ext/sst/ExtMaster.cc | 7 +------
ext/sst/ExtMaster.hh | 4 ++--
ext/sst/ExtSlave.cc | 6 ------
ext/sst/ExtSlave.hh | 4 +---
ext/sst/gem5.cc | 16 +++++++---------
ext/sst/gem5.hh | 4 ++--
ext/sst/libgem5.cc | 3 ---
ext/sst/tests/test6_arm_4c.py | 2 +-
8 files changed, 14 insertions(+), 32 deletions(-)
diffs (160 lines):
diff -r a51ae096ca25 -r 37b0af2c7ba8 ext/sst/ExtMaster.cc
--- a/ext/sst/ExtMaster.cc Wed Aug 24 14:20:53 2016 +0100
+++ b/ext/sst/ExtMaster.cc Fri Sep 02 14:58:15 2016 +0100
@@ -48,14 +48,9 @@
#undef fatal
#endif
-#include <core/sst_config.h>
-
#include <mem/packet.hh>
-#include <sst/core/component.h>
-#include <sst/core/params.h>
-#include <sst/core/link.h>
-#include <sst/elements/memHierarchy/memNIC.h>
+#include <elements/memHierarchy/memNIC.h>
using namespace SST;
using namespace SST::gem5;
diff -r a51ae096ca25 -r 37b0af2c7ba8 ext/sst/ExtMaster.hh
--- a/ext/sst/ExtMaster.hh Wed Aug 24 14:20:53 2016 +0100
+++ b/ext/sst/ExtMaster.hh Fri Sep 02 14:58:15 2016 +0100
@@ -48,8 +48,8 @@
#include <list>
#include <set>
-#include <sst/core/component.h>
-#include <sst/elements/memHierarchy/memEvent.h>
+#include <core/component.h>
+#include <elements/memHierarchy/memEvent.h>
#include <sim/sim_object.hh>
#include <mem/packet.hh>
diff -r a51ae096ca25 -r 37b0af2c7ba8 ext/sst/ExtSlave.cc
--- a/ext/sst/ExtSlave.cc Wed Aug 24 14:20:53 2016 +0100
+++ b/ext/sst/ExtSlave.cc Fri Sep 02 14:58:15 2016 +0100
@@ -44,12 +44,6 @@
#include "gem5.hh"
-#include <core/sst_config.h>
-
-#include <sst/core/params.h>
-#include <sst/core/output.h>
-#include <sst/core/link.h>
-
#ifdef fatal // gem5 sets this
#undef fatal
#endif
diff -r a51ae096ca25 -r 37b0af2c7ba8 ext/sst/ExtSlave.hh
--- a/ext/sst/ExtSlave.hh Wed Aug 24 14:20:53 2016 +0100
+++ b/ext/sst/ExtSlave.hh Fri Sep 02 14:58:15 2016 +0100
@@ -45,9 +45,7 @@
#ifndef EXT_SST_EXTSLAVE_HH
#define EXT_SST_EXTSLAVE_HH
-#include <sst/core/component.h>
-#include <sst/core/output.h>
-#include <sst/core/interfaces/simpleMem.h>
+#include <core/interfaces/simpleMem.h>
#include <sim/sim_object.hh>
#include <mem/packet.hh>
diff -r a51ae096ca25 -r 37b0af2c7ba8 ext/sst/gem5.cc
--- a/ext/sst/gem5.cc Wed Aug 24 14:20:53 2016 +0100
+++ b/ext/sst/gem5.cc Fri Sep 02 14:58:15 2016 +0100
@@ -1,4 +1,4 @@
-// Copyright (c) 2015 ARM Limited
+// Copyright (c) 2015-2016 ARM Limited
// All rights reserved.
//
// The license below extends only to copyright in the software and shall
@@ -65,9 +65,7 @@
#endif
// More SST Headers
-#include <sst/core/params.h>
-#include <sst/core/link.h>
-#include <sst/core/timeConverter.h>
+#include <core/timeConverter.h>
using namespace SST;
using namespace SST::gem5;
@@ -76,11 +74,11 @@
SST::Component(id)
{
dbg.init("@t:gem5:@p():@l " + getName() + ": ", 0, 0,
- (Output::output_location_t)params.find_integer("comp_debug", 0));
+ (Output::output_location_t)params.find<int>("comp_debug", 0));
info.init("gem5:" + getName() + ": ", 0, 0, Output::STDOUT);
TimeConverter *clock = registerClock(
- params.find_string("frequency", "1GHz"),
+ params.find<std::string>("frequency", "1GHz"),
new Clock::Handler<gem5Component>(this,
&gem5Component::clockTick));
// This sets how many gem5 cycles we'll need to simulate per clock tick
@@ -89,7 +87,7 @@
// Disable gem5's inform() messages.
want_info = false;
- std::string cmd = params.find_string("cmd", "");
+ std::string cmd = params.find<std::string>("cmd", "");
if (cmd.empty()) {
dbg.fatal(CALL_INFO, -1, "Component %s must have a 'cmd' parameter.\n",
getName().c_str());
@@ -106,7 +104,7 @@
}
std::vector<char*> flags;
- std::string gem5DbgFlags = params.find_string("gem5DebugFlags", "");
+ std::string gem5DbgFlags = params.find<std::string>("gem5DebugFlags", "");
splitCommandArgs(gem5DbgFlags, flags);
for (auto flag : flags) {
dbg.output(CALL_INFO, " Setting Debug Flag [%s]\n", flag);
@@ -162,7 +160,7 @@
for (auto m : masters) {
m->finish();
}
- info.output("Complete. Clocks Processed: %"PRIu64"\n", clocks_processed);
+ info.output("Complete. Clocks Processed: %" PRIu64"\n", clocks_processed);
}
bool
diff -r a51ae096ca25 -r 37b0af2c7ba8 ext/sst/gem5.hh
--- a/ext/sst/gem5.hh Wed Aug 24 14:20:53 2016 +0100
+++ b/ext/sst/gem5.hh Fri Sep 02 14:58:15 2016 +0100
@@ -48,8 +48,8 @@
#include <string>
#include <vector>
-#include <sst/core/component.h>
-#include <sst/core/output.h>
+#include <core/sst_config.h>
+#include <core/component.h>
#include <sim/simulate.hh>
diff -r a51ae096ca25 -r 37b0af2c7ba8 ext/sst/libgem5.cc
--- a/ext/sst/libgem5.cc Wed Aug 24 14:20:53 2016 +0100
+++ b/ext/sst/libgem5.cc Fri Sep 02 14:58:15 2016 +0100
@@ -44,9 +44,6 @@
#include <core/sst_config.h>
-#include <sst/core/element.h>
-#include <sst/core/component.h>
-
#include "gem5.hh"
static
diff -r a51ae096ca25 -r 37b0af2c7ba8 ext/sst/tests/test6_arm_4c.py
--- a/ext/sst/tests/test6_arm_4c.py Wed Aug 24 14:20:53 2016 +0100
+++ b/ext/sst/tests/test6_arm_4c.py Fri Sep 02 14:58:15 2016 +0100
@@ -1,4 +1,4 @@
-# Copyright (c)2015 ARM Limited
+# Copyright (c) 2015-2016 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
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