changeset 40c951e58c2b in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=40c951e58c2b
description:
cpu: Support exit when any one Trace CPU completes replay
This change adds a Trace CPU param to exit simulation early,
i.e. when the first (any one) trace execution is complete. With
this change the user gets a choice to configure exit as either
when the last CPU finishes (default) or first CPU finishes
replay. Configuring an early exit enables simulating and
measuring stats strictly when memory-system resources are being
stressed by all Trace CPUs.
Change-Id: I3998045fdcc5cd343e1ca92d18dd7f7ecdba8f1d
Reviewed-by: Nikos Nikoleris <[email protected]>
diffstat:
src/cpu/trace/TraceCPU.py | 5 +++++
src/cpu/trace/trace_cpu.cc | 27 +++++++++++++++++++++------
src/cpu/trace/trace_cpu.hh | 6 ++++++
3 files changed, 32 insertions(+), 6 deletions(-)
diffs (79 lines):
diff -r a96d6787b385 -r 40c951e58c2b src/cpu/trace/TraceCPU.py
--- a/src/cpu/trace/TraceCPU.py Thu Sep 15 18:01:16 2016 +0100
+++ b/src/cpu/trace/TraceCPU.py Thu Sep 15 18:01:20 2016 +0100
@@ -75,3 +75,8 @@
# frequency as was used for generating the traces.
freqMultiplier = Param.Float(1.0, "Multiplier scale the Trace CPU "\
"frequency up or down")
+
+ # Enable exiting when any one Trace CPU completes execution which is set to
+ # false by default
+ enableEarlyExit = Param.Bool(False, "Exit when any one Trace CPU "\
+ "completes execution")
diff -r a96d6787b385 -r 40c951e58c2b src/cpu/trace/trace_cpu.cc
--- a/src/cpu/trace/trace_cpu.cc Thu Sep 15 18:01:16 2016 +0100
+++ b/src/cpu/trace/trace_cpu.cc Thu Sep 15 18:01:20 2016 +0100
@@ -61,7 +61,8 @@
dcacheNextEvent(this),
oneTraceComplete(false),
traceOffset(0),
- execCompleteEvent(nullptr)
+ execCompleteEvent(nullptr),
+ enableEarlyExit(params->enableEarlyExit)
{
// Increment static counter for number of Trace CPUs.
++TraceCPU::numTraceCPUs;
@@ -137,10 +138,16 @@
// events using a relative tick delta
dcacheGen.adjustInitTraceOffset(traceOffset);
- // The static counter for number of Trace CPUs is correctly set at this
- // point so create an event and pass it.
- execCompleteEvent = new CountedExitEvent("end of all traces reached.",
- numTraceCPUs);
+ // If the Trace CPU simulation is configured to exit on any one trace
+ // completion then we don't need a counted event to count down all Trace
+ // CPUs in the system. If not then instantiate a counted event.
+ if (!enableEarlyExit) {
+ // The static counter for number of Trace CPUs is correctly set at
+ // this point so create an event and pass it.
+ execCompleteEvent = new CountedExitEvent("end of all traces reached.",
+ numTraceCPUs);
+ }
+
}
void
@@ -191,7 +198,15 @@
// Schedule event to indicate execution is complete as both
// instruction and data access traces have been played back.
inform("%s: Execution complete.\n", name());
- schedule(*execCompleteEvent, curTick());
+ // If the replay is configured to exit early, that is when any one
+ // execution is complete then exit immediately and return. Otherwise,
+ // schedule the counted exit that counts down completion of each Trace
+ // CPU.
+ if (enableEarlyExit) {
+ exitSimLoop("End of trace reached");
+ } else {
+ schedule(*execCompleteEvent, curTick());
+ }
}
}
diff -r a96d6787b385 -r 40c951e58c2b src/cpu/trace/trace_cpu.hh
--- a/src/cpu/trace/trace_cpu.hh Thu Sep 15 18:01:16 2016 +0100
+++ b/src/cpu/trace/trace_cpu.hh Thu Sep 15 18:01:20 2016 +0100
@@ -1116,6 +1116,12 @@
*/
CountedExitEvent *execCompleteEvent;
+ /**
+ * Exit when any one Trace CPU completes its execution. If this is
+ * configured true then the execCompleteEvent is not scheduled.
+ */
+ const bool enableEarlyExit;
+
Stats::Scalar numSchedDcacheEvent;
Stats::Scalar numSchedIcacheEvent;
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