> On Oct. 18, 2016, 1:55 p.m., Jason Lowe-Power wrote:
> > configs/example/arm/fs_bigLITTLE.py, line 66
> > <http://reviews.gem5.org/r/3666/diff/3/?file=61784#file61784line66>
> >
> >     Rather than having an extra parameter, could you make a subclass of the 
> > BigCluster? If this would introduce a lot more code, you shouldn't do it, 
> > but I think it would make things cleaner.

Indeed, this will introduce more code. What about adding two new options, 
--big-cpus-type and --little-cpus-type, while removing --ex5 and --atomic?


- Anastasiia


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/3666/#review8889
-----------------------------------------------------------


On Oct. 18, 2016, 4:08 a.m., Anastasiia Butko wrote:
> 
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3666/
> -----------------------------------------------------------
> 
> (Updated Oct. 18, 2016, 4:08 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> -------
> 
> Changeset 11670:c9fd4bc4a0cf
> ---------------------------
> arm, config: added support for ex5 model of big.LITTLE
> 
> This patch enables using calibrated big and LITTLE
> cores, ex5_big and ex5_LITTLE instead of the default
> 'arm_detailed' and 'minor' cpus. The ex5 model is based
> on the Samsung Exynos 5 Octa (5422) SoC. Operation and
> memory hierarchy latencies have been calibrated using the
> lmbench micro-benchmark suite. The preliminary validation
> results have been published as:
> 'Full-System Simulation of big.LITTLE Multicore Architecture
> for Performance and Energy Exploration', in International
> Symposium on Embedded Multicore/Many-core Systems-on-Chip
> (MCSoC'16), Lyon, France (Sep, 2016).
> 
> lat_ops bench results:
> ----------------------------------------------
>                  big            LITTLE
> ops           SoC     gem5    SoC     gem5
> ----------------------------------------------
> integer       bit:    0.5     0.48    0.72    0.7
> integer       add:    0.5     0.55    0.72    0.4
> integer       mul:    1.56    1.68    2.16    1.87
> integer       div:    45.36   36.32   53.3    47.32
> integer       mod:    6.56    18.55   17.37   18.02
> int64 bit:    0.51    0.98    1.45    1.42
> uint64        add:    0.63    0.98    1.56    0.93
> int64 mul:    2.52    2.13    3.64    4.68
> int64 div:    92.61   195.52  213.14  197.63
> int64 mod:    47.91   146.78  135.41  138.91
> float add:    2.52    2.71    2.88    2.61
> float mul:    3.02    2.84    2.88    2.73
> float div:    9.07    8.94    12.98   2.82
> double        add:    2.52    2.71    2.88    2.61
> double        mul:    3.02    2.84    5.04    2.73
> double        div:    16.13   10.43   23.03   2.81
> 
> lat_mem_rd bench results:
> ----------------------------------------------
>                  big            LITTLE
> cache mem     SoC     gem5    SoC     gem5
> ----------------------------------------------
> l1/l1 0.5K    4       4       3       3
>       1K      4       4       3       3
>       2K      4       4       3       3
>       3K      4       4       3       3
>       4K      4       4       3       3
>       6K      4       4       3       3
>       8K      4       4       3       3
>       12K     4       4       3       3
>       16K     4       18      3       3
>       24K     13      17      3       3
>       32K     18      18      6       11
> l2/l2 48K     23      20      9       14
>       64K     22      23      11      14
>       96K     23      23      13      14
>       128K    23      23      14      15
>       192K    23      23      15      17
>       256K    23      23      17      17
>       384K    23      24      29      17
>       512K    23      24      59      39
> l2/Mem        768K    23      24      86      97
>       1M      23      24      112     110
>       1.5M    35      25      153     147
>       2M      81      56      165     172
> Mem/Mem       3M      167     162     170     179
>       4M      217     213     171     182
>       6M      251     247     171     182
>       8M      260     257     171     182
>       12M     263     261     171     182
>       16M     265     261     171     182
> 
> Reported-by: Anastasiia Butko <abu...@lbl.gov>
> 
> 
> Diffs
> -----
> 
>   configs/common/ex5_big.py PRE-CREATION 
>   configs/example/arm/fs_bigLITTLE.py 220fa4099b9a 
>   configs/common/CpuConfig.py 220fa4099b9a 
>   configs/common/ex5_LITTLE.py PRE-CREATION 
> 
> Diff: http://reviews.gem5.org/r/3666/diff/
> 
> 
> Testing
> -------
> 
> 
> Thanks,
> 
> Anastasiia Butko
> 
>

_______________________________________________
gem5-dev mailing list
gem5-dev@gem5.org
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to