I'll certainly add regressions for "hello" for each of the four models, and I'll try to get other "quick" tests done the same way, too. I won't be able to do all of them as m5threads hasn't been implemented for RISC-V, but I'll do what I can. I can also do the "long" ones the same way, if time isn't a concern (I noticed some were from SPEC, which could take a long time to complete).
Because m5threads hasn't been implemented for RISC-V, and my patches only support SE mode, I can't actually test if the atomic instructions work properly when used concurrently, but I can at least test that they perform the read-modify-write operations properly. Is it okay if I add a few regressions that only work for RISC-V since they'd use assembly calls? For that matter, should I be making sure that the existing regressions cover corner cases in instructions, or is it sufficient to see that each instruction is represented at least once by them? I could write some tests that check corner cases, but at least some would use assembly calls and thus be incompatible with anything other than RISC-V. On Thu, Oct 27, 2016 at 5:55 PM, Jason Lowe-Power <[email protected]> wrote: > Hi Alec, > > Thanks again for implementing RISC-V in gem5. It's an incredibly important > and timely addition! > > As far as I can tell, the patches look good. Hopefully some other will > review them soon as well. > > The only thing that's missing that I would really like to have before > pushing the patches is some regression tests for RISC-V. If you could look > at http://gem5.org/Regression_Tests and have a go at adding some > regressions, it would be helpful. It would be *great* if you could make > sure the regressions cover most of what you've implemented (e.g., > multiply/atomic/etc. instructions, Linux syscalls, etc.). If that isn't > possible, at least having a "hello" regression for a couple of different > CPU models is needed. > > Thanks again for your contribution! > > Jason > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
