changeset 511b47e9b9bc in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=511b47e9b9bc
description:
gpu-compute: fix segfault when constructing GPUExecContext
the GPUExecContext context currently stores a reference to its parent
WF's
GPUISA object, however there are some special instructions that do not
have
an associated WF. when these objects are constructed they set their WF
pointer
to null, which causes the GPUExecContext to segfault when trying to
dereference
the WF pointer to get at the WF's GPUISA object. here we change the
GPUISA
reference in the GPUExecContext class to a pointer so that it may be
set to
null.
diffstat:
src/gpu-compute/gpu_exec_context.cc | 8 +++++---
src/gpu-compute/gpu_exec_context.hh | 2 +-
2 files changed, 6 insertions(+), 4 deletions(-)
diffs (40 lines):
diff -r 499071baed7b -r 511b47e9b9bc src/gpu-compute/gpu_exec_context.cc
--- a/src/gpu-compute/gpu_exec_context.cc Mon Nov 21 15:38:30 2016 -0500
+++ b/src/gpu-compute/gpu_exec_context.cc Mon Nov 21 15:40:03 2016 -0500
@@ -37,7 +37,7 @@
#include "gpu-compute/wavefront.hh"
GPUExecContext::GPUExecContext(ComputeUnit *_cu, Wavefront *_wf)
- : cu(_cu), wf(_wf), gpuISA(_wf->gpuISA())
+ : cu(_cu), wf(_wf), gpuISA(_wf ? &_wf->gpuISA() : nullptr)
{
}
@@ -56,11 +56,13 @@
TheGpuISA::MiscReg
GPUExecContext::readMiscReg(int opIdx) const
{
- return gpuISA.readMiscReg(opIdx);
+ assert(gpuISA);
+ return gpuISA->readMiscReg(opIdx);
}
void
GPUExecContext::writeMiscReg(int opIdx, TheGpuISA::MiscReg operandVal)
{
- gpuISA.writeMiscReg(opIdx, operandVal);
+ assert(gpuISA);
+ gpuISA->writeMiscReg(opIdx, operandVal);
}
diff -r 499071baed7b -r 511b47e9b9bc src/gpu-compute/gpu_exec_context.hh
--- a/src/gpu-compute/gpu_exec_context.hh Mon Nov 21 15:38:30 2016 -0500
+++ b/src/gpu-compute/gpu_exec_context.hh Mon Nov 21 15:40:03 2016 -0500
@@ -55,7 +55,7 @@
protected:
ComputeUnit *cu;
Wavefront *wf;
- TheGpuISA::GPUISA &gpuISA;
+ TheGpuISA::GPUISA *gpuISA;
};
#endif // __GPU_EXEC_CONTEXT_HH__
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