Hi, I had posted a problem that I faced with x86 minor cpu regarding branch prediction on gem5 users mailing list (link of that post is given below):
https://www.mail-archive.com/[email protected]/msg13325.html I could not look into it later and now have got a chance to work on it again. Based on my observations I had put some code lines (just a rough hack) in fetch2.cc file (in Fetch2::predictBranch): std::string x86Instruction = inst->staticInst->disassemble( inst->pc.instAddr()); char * cstrx86 = new char [x86Instruction.length()+1]; std::strcpy (cstrx86, x86Instruction.c_str()); char *TempToken = strtok(cstrx86," "); if( strncmp(TempToken,"jnz",3)==0 || strncmp(TempToken,"jz",2)==0 || strncmp(TempToken,"jb",2)==0 || strncmp(TempToken,"jnb",3)==0 || strncmp(TempToken,"jbe",3)==0 ) inst->staticInst->flags.set(11); //Control flag if( strncmp(TempToken,"jnbe",4)==0 || strncmp(TempToken,"js",2)==0 || strncmp(TempToken,"jns",3)==0 || strncmp(TempToken,"jp",2)==0 || strncmp(TempToken,"jnp",3)==0 ) inst->staticInst->flags.set(11); if( strncmp(TempToken,"jl",2)==0 || strncmp(TempToken,"jnl",3)==0 || strncmp(TempToken,"jle",3)==0 || strncmp(TempToken,"jnle",4)==0 || strncmp(TempToken,"jo",2)==0 ) inst->staticInst->flags.set(11); if( strncmp(TempToken,"jno",3)==0 || strncmp(TempToken,"jrcx",4)==0 || strncmp(TempToken,"iret",4)==0 || strncmp(TempToken,"iretd",4)==0 || strncmp(TempToken,"loop",2)==0 ) inst->staticInst->flags.set(11); if( strncmp(TempToken,"loopne",6)==0 || strncmp(TempToken,"loope",5)==0 || strncmp(TempToken,"ret",3)==0 || strncmp(TempToken,"call",4)==0) inst->staticInst->flags.set(11); if(strncmp(TempToken,"jmp",3)==0) { inst->staticInst->flags.set(11); inst->staticInst->flags.set(15); //UnCondControl } if(strncmp(TempToken,"call",4)==0) { inst->staticInst->flags.set(16); //set IsCall inst->staticInst->flags.set(11); inst->staticInst->flags.set(15); } if((strncmp(TempToken,"ret",3)==0) || (strncmp(TempToken,"iret",4)==0))// || strncmp(TempToken,"iretd",3)==0) { inst->staticInst->flags.set(17); //set IsReturn inst->staticInst->flags.set(11); inst->staticInst->flags.set(15); //UnCOndControl } // Next lines are existing already if (inst->staticInst->isControl() || inst->staticInst->isSyscall()) { /* Tried to predict */ inst->triedToPredict = true; DPRINTF(Branch, "Trying to predict for inst: %s\n", *inst); if (branchPredictor.predict(inst->staticInst, inst->id.fetchSeqNum, inst_pc, inst->id.threadId)) { ............................................................ ....................... // ############################################################ ##########################################// After adding these lines it seems that branch predictor is working for x86 minor cpu. I have tested many benchmarks, most of them work, but this hack fails for some. I wonder if minor cpu developers can take a look into this issue ? Thanks for your time _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
