changeset e922938edf18 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=e922938edf18
description:
config: Add whole line accesses to improve memchecker's coverage
Change-Id: Ie1a047139e350ce7400f3a20be644eaff1e21428
Reviewed-by: Andreas Hansson <[email protected]>
diffstat:
configs/example/memcheck.py | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diffs (21 lines):
diff -r cd6248b276a8 -r e922938edf18 configs/example/memcheck.py
--- a/configs/example/memcheck.py Mon Dec 05 16:48:29 2016 -0500
+++ b/configs/example/memcheck.py Mon Dec 05 16:48:30 2016 -0500
@@ -1,4 +1,4 @@
-# Copyright (c) 2015 ARM Limited
+# Copyright (c) 2015-2016 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -188,9 +188,9 @@
# Three states, with random, linear and idle behaviours. The random
# and linear states access memory in the range [0 : 16 Mbyte] with 8
-# byte accesses.
+# byte and 64 byte accesses respectively.
cfg_file.write("STATE 0 10000000 RANDOM 65 0 16777216 8 50000 150000 0\n")
-cfg_file.write("STATE 1 10000000 LINEAR 65 0 16777216 8 50000 150000 0\n")
+cfg_file.write("STATE 1 10000000 LINEAR 65 0 16777216 64 50000 150000 0\n")
cfg_file.write("STATE 2 10000000 IDLE\n")
cfg_file.write("INIT 0\n")
cfg_file.write("TRANSITION 0 1 0.5\n")
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