changeset a6da15219f95 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a6da15219f95
description:
mem: Always use InvalidateReq to service WriteLineReq misses
Previously, a WriteLineReq that missed in a cache would send out an
InvalidateReq if the block lookup failed or an UpgradeReq if the
block lookup succeeded but the block had sharers. This changes ensures
that a WriteLineReq always sends an InvalidateReq to invalidate all
copies of the block and satisfy the WriteLineReq.
Change-Id: I207ff5b267663abf02bc0b08aeadde69ad81be61
Reviewed-by: Andreas Hansson <[email protected]>
diffstat:
src/mem/cache/cache.cc | 13 +++++++------
1 files changed, 7 insertions(+), 6 deletions(-)
diffs (30 lines):
diff -r 6b84b831f47d -r a6da15219f95 src/mem/cache/cache.cc
--- a/src/mem/cache/cache.cc Mon Dec 05 16:48:24 2016 -0500
+++ b/src/mem/cache/cache.cc Mon Dec 05 16:48:25 2016 -0500
@@ -924,7 +924,13 @@
// write miss on a shared owned block will generate a ReadExcl,
// which will clobber the owned copy.
const bool useUpgrades = true;
- if (blkValid && useUpgrades) {
+ if (cpu_pkt->cmd == MemCmd::WriteLineReq) {
+ assert(!blkValid || !blk->isWritable());
+ // forward as invalidate to all other caches, this gives us
+ // the line in Exclusive state, and invalidates all other
+ // copies
+ cmd = MemCmd::InvalidateReq;
+ } else if (blkValid && useUpgrades) {
// only reason to be here is that blk is read only and we need
// it to be writable
assert(needsWritable);
@@ -937,11 +943,6 @@
// where the determination the StoreCond fails is delayed due to
// all caches not being on the same local bus.
cmd = MemCmd::SCUpgradeFailReq;
- } else if (cpu_pkt->cmd == MemCmd::WriteLineReq) {
- // forward as invalidate to all other caches, this gives us
- // the line in Exclusive state, and invalidates all other
- // copies
- cmd = MemCmd::InvalidateReq;
} else {
// block is invalid
cmd = needsWritable ? MemCmd::ReadExReq :
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