Hi Christian,

Great work! Thanks for getting this in shape.

Regarding your question on delays, the packet.hh header has a fairly
elaborate description (and yes, I am to blame). The delays are set and
incremented by the CoherentXBar and Cache for cases where the request
packets must make immediate progress due to the coherency protocol
implementation in gem5. Normally the delays are then actually added as
part of the response path. See for example the CoherentXBar and
recvTimingResp.

If a packet reaches the TLM bridge and these fields are non-zero, the best
thing to do would be to pay for it then and there, delay the packet, and
zero the fields. That way we 1) put the delays closer to where they really
should occur, and 2) avoid having to remember what packet should have what
delay fields.

Does that make sense?

Andreas

On 09/01/2017, 13:58, "Christian Menard" <[email protected]>
wrote:

>Dear all,
>
>I worked on series of patches [1-6] that implement a complete gem5 <->
>SystemC-TLM bridge. This is based on the previous work in util/tlm by
>Matthias
>Jung. Please see the README in the last patch [6] for more details.
>
>I would like to ask you to review the patches and to push them to
>mainline
>soon if there are no major issues found.
>
>I also have a small question that I would like to resolve before the
>final
>submission. When translating between gem5 Packets and TLM Transactions, I
>wonder how to handle the delays that are annotated to gem5 Packets
>(headerDelay, payloadDelay). What exactly are these delays used for and
>how
>should a Sender/Receiver handle these delays?
>
>The patch series depends on some other small patches. There are two
>patches
>from Matthias Jung [7,8], an old patch from me that gives the
>ExternalMaster a
>MasterID [9], and a new patch that does a small change in util/systemc
>[10].
>
>During my work on the bridge, I noticed a problem with the
>CxxConfigManager.
>Please see my post on the mailing list [11] and the corresponding patch
>[12].
>
>Thanks!
>
>Kind regards,
>Christian
>
>[1] http://reviews.gem5.org/r/3527/
>[2] http://reviews.gem5.org/r/3528/
>[3] http://reviews.gem5.org/r/3686/
>[4] http://reviews.gem5.org/r/3695/
>[5] http://reviews.gem5.org/r/3775/
>[6] http://reviews.gem5.org/r/3777/
>
>[7] http://reviews.gem5.org/r/3478/
>[8] http://reviews.gem5.org/r/3479/
>[9] http://reviews.gem5.org/r/3480/
>[10] http://reviews.gem5.org/r/3774/
>
>[11] http://www.mail-archive.com/[email protected]/msg21318.html
>[12] http://reviews.gem5.org/r/3778/
>
>--
>Dipl.-Ing. Christian Menard
>Research Assistant
>
>TU Dresden
>Faculty of Computer Science
>Chair for Compiler Construction
>01062 Dresden
>
>Phone: +49 351 463-42441
>e-Mail: [email protected]
>

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