changeset 54436a1784dc in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=54436a1784dc
description:
        style: [patch 3/22] reduce include dependencies in some headers

        Used cppclean to help identify useless includes and removed them. This
        involved erroneously included headers, but also cases where forward
        declarations could have been used rather than a full include.

diffstat:

 src/arch/alpha/process.cc                              |   1 +
 src/arch/alpha/process.hh                              |   1 +
 src/arch/arm/process.cc                                |   1 +
 src/arch/arm/process.hh                                |   1 +
 src/arch/mips/process.cc                               |   1 +
 src/arch/mips/process.hh                               |   1 +
 src/arch/power/interrupts.hh                           |   1 +
 src/arch/power/process.cc                              |   1 +
 src/arch/power/process.hh                              |   1 +
 src/arch/power/remote_gdb.cc                           |   2 +
 src/arch/riscv/interrupts.hh                           |   1 +
 src/arch/riscv/process.cc                              |   1 +
 src/arch/riscv/process.hh                              |   1 +
 src/arch/sparc/process.cc                              |   1 +
 src/arch/sparc/process.hh                              |   1 +
 src/arch/x86/isa_traits.hh                             |   1 +
 src/arch/x86/pagetable.hh                              |   3 +-
 src/arch/x86/process.cc                                |   1 +
 src/arch/x86/pseudo_inst.cc                            |   3 +-
 src/arch/x86/system.cc                                 |   7 ---
 src/arch/x86/system.hh                                 |   4 -
 src/arch/x86/tlb.cc                                    |   4 -
 src/arch/x86/tlb.hh                                    |   5 --
 src/arch/x86/utility.cc                                |   3 +-
 src/arch/x86/utility.hh                                |   6 --
 src/base/bitfield.hh                                   |   2 +-
 src/base/bitunion.hh                                   |   1 -
 src/base/time.cc                                       |   1 +
 src/base/vnc/vncinput.cc                               |   3 +-
 src/cpu/minor/buffers.hh                               |   1 +
 src/cpu/testers/directedtest/InvalidateGenerator.cc    |   1 +
 src/cpu/testers/directedtest/RubyDirectedTester.cc     |   1 +
 src/cpu/testers/directedtest/SeriesRequestGenerator.cc |   1 +
 src/cpu/testers/memtest/memtest.cc                     |   1 +
 src/cpu/testers/rubytest/Check.cc                      |   1 +
 src/cpu/testers/rubytest/CheckTable.cc                 |   1 +
 src/cpu/testers/rubytest/RubyTester.cc                 |   1 +
 src/dev/arm/flash_device.cc                            |   1 +
 src/dev/mc146818.hh                                    |   1 +
 src/dev/net/dist_iface.hh                              |   1 +
 src/dev/net/etherbus.cc                                |   1 +
 src/dev/net/etherswitch.cc                             |   2 +
 src/gpu-compute/vector_register_file.hh                |   1 +
 src/kern/linux/linux.cc                                |   1 -
 src/kern/linux/linux.hh                                |   2 +-
 src/mem/cache/prefetch/stride.cc                       |   1 +
 src/mem/external_master.cc                             |   1 +
 src/mem/external_slave.cc                              |   1 +
 src/mem/mem_checker.hh                                 |   1 +
 src/mem/multi_level_page_table.hh                      |   5 +-
 src/mem/multi_level_page_table_impl.hh                 |   9 +--
 src/mem/page_table.cc                                  |   7 +--
 src/mem/page_table.hh                                  |   3 +-
 src/mem/ruby/network/MessageBuffer.hh                  |   1 +
 src/mem/ruby/structures/AbstractReplacementPolicy.cc   |   2 +
 src/mem/se_translating_port_proxy.hh                   |   2 +-
 src/mem/simple_mem.cc                                  |   1 +
 src/python/swig/pyevent.cc                             |   1 +
 src/sim/SConscript                                     |   3 +
 src/sim/arguments.cc                                   |   1 -
 src/sim/arguments.hh                                   |   1 -
 src/sim/byteswap.hh                                    |   1 -
 src/sim/clock_domain.cc                                |   1 +
 src/sim/clocked_object.hh                              |   1 -
 src/sim/cxx_config.hh                                  |   2 -
 src/sim/cxx_config_ini.cc                              |   2 +
 src/sim/cxx_config_ini.hh                              |   1 -
 src/sim/cxx_manager.cc                                 |   1 +
 src/sim/drain.hh                                       |   2 -
 src/sim/dvfs_handler.cc                                |  26 +++++++++++
 src/sim/dvfs_handler.hh                                |  26 +-----------
 src/sim/eventq.hh                                      |   1 -
 src/sim/fd_entry.hh                                    |   4 +-
 src/sim/init_signals.cc                                |   1 +
 src/sim/insttracer.hh                                  |   3 +-
 src/sim/microcode_rom.cc                               |  40 ++++++++++++++++++
 src/sim/microcode_rom.hh                               |  13 ++---
 src/sim/power/mathexpr_powermodel.hh                   |   6 +-
 src/sim/power/power_model.cc                           |   2 +-
 src/sim/power/power_model.hh                           |   5 +-
 src/sim/power/thermal_domain.cc                        |   5 +-
 src/sim/power/thermal_domain.hh                        |   4 +-
 src/sim/power/thermal_entity.hh                        |   3 +-
 src/sim/power/thermal_model.hh                         |   1 -
 src/sim/probe/probe.cc                                 |   1 +
 src/sim/probe/probe.hh                                 |   3 +-
 src/sim/process.cc                                     |   8 +--
 src/sim/process.hh                                     |  10 ++-
 src/sim/process_impl.hh                                |   1 -
 src/sim/root.cc                                        |   4 +-
 src/sim/serialize.hh                                   |   4 +-
 src/sim/sim_exit.hh                                    |   3 +-
 src/sim/sim_object.cc                                  |   6 --
 src/sim/sim_object.hh                                  |   9 +--
 src/sim/simulate.hh                                    |   3 +-
 src/sim/stat_register.cc                               |   2 +
 src/sim/stat_register.hh                               |   2 -
 src/sim/sub_system.hh                                  |   1 -
 src/sim/syscall_emul.cc                                |   2 -
 src/sim/syscall_emul.hh                                |  27 +++++------
 src/sim/syscall_return.hh                              |   2 +-
 src/sim/system.hh                                      |   3 -
 src/sim/ticked_object.cc                               |   3 +
 src/sim/ticked_object.hh                               |   3 +-
 src/sim/voltage_domain.cc                              |   1 +
 src/sim/vptr.hh                                        |   2 -
 106 files changed, 203 insertions(+), 166 deletions(-)

diffs (truncated from 1660 to 300 lines):

diff -r e47703369039 -r 54436a1784dc src/arch/alpha/process.cc
--- a/src/arch/alpha/process.cc Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/alpha/process.cc Wed Nov 09 14:27:40 2016 -0600
@@ -40,6 +40,7 @@
 #include "mem/page_table.hh"
 #include "sim/byteswap.hh"
 #include "sim/process_impl.hh"
+#include "sim/syscall_return.hh"
 #include "sim/system.hh"
 
 using namespace AlphaISA;
diff -r e47703369039 -r 54436a1784dc src/arch/alpha/process.hh
--- a/src/arch/alpha/process.hh Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/alpha/process.hh Wed Nov 09 14:27:40 2016 -0600
@@ -32,6 +32,7 @@
 #ifndef __ARCH_ALPHA_PROCESS_HH__
 #define __ARCH_ALPHA_PROCESS_HH__
 
+#include "mem/page_table.hh"
 #include "sim/process.hh"
 
 class AlphaLiveProcess : public LiveProcess
diff -r e47703369039 -r 54436a1784dc src/arch/arm/process.cc
--- a/src/arch/arm/process.cc   Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/arm/process.cc   Wed Nov 09 14:27:40 2016 -0600
@@ -53,6 +53,7 @@
 #include "mem/page_table.hh"
 #include "sim/byteswap.hh"
 #include "sim/process_impl.hh"
+#include "sim/syscall_return.hh"
 #include "sim/system.hh"
 
 using namespace std;
diff -r e47703369039 -r 54436a1784dc src/arch/arm/process.hh
--- a/src/arch/arm/process.hh   Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/arm/process.hh   Wed Nov 09 14:27:40 2016 -0600
@@ -48,6 +48,7 @@
 
 #include "arch/arm/intregs.hh"
 #include "base/loader/object_file.hh"
+#include "mem/page_table.hh"
 #include "sim/process.hh"
 
 class LiveProcess;
diff -r e47703369039 -r 54436a1784dc src/arch/mips/process.cc
--- a/src/arch/mips/process.cc  Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/mips/process.cc  Wed Nov 09 14:27:40 2016 -0600
@@ -41,6 +41,7 @@
 #include "mem/page_table.hh"
 #include "sim/process.hh"
 #include "sim/process_impl.hh"
+#include "sim/syscall_return.hh"
 #include "sim/system.hh"
 
 using namespace std;
diff -r e47703369039 -r 54436a1784dc src/arch/mips/process.hh
--- a/src/arch/mips/process.hh  Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/mips/process.hh  Wed Nov 09 14:27:40 2016 -0600
@@ -35,6 +35,7 @@
 #include <string>
 #include <vector>
 
+#include "mem/page_table.hh"
 #include "sim/process.hh"
 
 class LiveProcess;
diff -r e47703369039 -r 54436a1784dc src/arch/power/interrupts.hh
--- a/src/arch/power/interrupts.hh      Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/power/interrupts.hh      Wed Nov 09 14:27:40 2016 -0600
@@ -35,6 +35,7 @@
 #include "params/PowerInterrupts.hh"
 #include "sim/sim_object.hh"
 
+class BaseCPU;
 class ThreadContext;
 
 namespace PowerISA {
diff -r e47703369039 -r 54436a1784dc src/arch/power/process.cc
--- a/src/arch/power/process.cc Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/power/process.cc Wed Nov 09 14:27:40 2016 -0600
@@ -41,6 +41,7 @@
 #include "debug/Stack.hh"
 #include "mem/page_table.hh"
 #include "sim/process_impl.hh"
+#include "sim/syscall_return.hh"
 #include "sim/system.hh"
 
 using namespace std;
diff -r e47703369039 -r 54436a1784dc src/arch/power/process.hh
--- a/src/arch/power/process.hh Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/power/process.hh Wed Nov 09 14:27:40 2016 -0600
@@ -36,6 +36,7 @@
 #include <string>
 #include <vector>
 
+#include "mem/page_table.hh"
 #include "sim/process.hh"
 
 class LiveProcess;
diff -r e47703369039 -r 54436a1784dc src/arch/power/remote_gdb.cc
--- a/src/arch/power/remote_gdb.cc      Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/power/remote_gdb.cc      Wed Nov 09 14:27:40 2016 -0600
@@ -133,6 +133,7 @@
  * "Stub" to allow remote cpu to debug over a serial line using gdb.
  */
 
+
 #include "arch/power/remote_gdb.hh"
 
 #include <sys/signal.h>
@@ -144,6 +145,7 @@
 #include "cpu/thread_state.hh"
 #include "debug/GDBAcc.hh"
 #include "debug/GDBMisc.hh"
+#include "mem/page_table.hh"
 #include "sim/byteswap.hh"
 
 using namespace std;
diff -r e47703369039 -r 54436a1784dc src/arch/riscv/interrupts.hh
--- a/src/arch/riscv/interrupts.hh      Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/riscv/interrupts.hh      Wed Nov 09 14:27:40 2016 -0600
@@ -35,6 +35,7 @@
 #include "params/RiscvInterrupts.hh"
 #include "sim/sim_object.hh"
 
+class BaseCPU;
 class ThreadContext;
 
 namespace RiscvISA {
diff -r e47703369039 -r 54436a1784dc src/arch/riscv/process.cc
--- a/src/arch/riscv/process.cc Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/riscv/process.cc Wed Nov 09 14:27:40 2016 -0600
@@ -44,6 +44,7 @@
 #include "mem/page_table.hh"
 #include "sim/process.hh"
 #include "sim/process_impl.hh"
+#include "sim/syscall_return.hh"
 #include "sim/system.hh"
 
 using namespace std;
diff -r e47703369039 -r 54436a1784dc src/arch/riscv/process.hh
--- a/src/arch/riscv/process.hh Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/riscv/process.hh Wed Nov 09 14:27:40 2016 -0600
@@ -35,6 +35,7 @@
 #include <string>
 #include <vector>
 
+#include "mem/page_table.hh"
 #include "sim/process.hh"
 
 class LiveProcess;
diff -r e47703369039 -r 54436a1784dc src/arch/sparc/process.cc
--- a/src/arch/sparc/process.cc Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/sparc/process.cc Wed Nov 09 14:27:40 2016 -0600
@@ -43,6 +43,7 @@
 #include "debug/Stack.hh"
 #include "mem/page_table.hh"
 #include "sim/process_impl.hh"
+#include "sim/syscall_return.hh"
 #include "sim/system.hh"
 
 using namespace std;
diff -r e47703369039 -r 54436a1784dc src/arch/sparc/process.hh
--- a/src/arch/sparc/process.hh Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/sparc/process.hh Wed Nov 09 14:27:40 2016 -0600
@@ -35,6 +35,7 @@
 #include <string>
 #include <vector>
 
+#include "mem/page_table.hh"
 #include "sim/byteswap.hh"
 #include "sim/process.hh"
 
diff -r e47703369039 -r 54436a1784dc src/arch/x86/isa_traits.hh
--- a/src/arch/x86/isa_traits.hh        Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/x86/isa_traits.hh        Wed Nov 09 14:27:40 2016 -0600
@@ -42,6 +42,7 @@
 
 #include "arch/x86/types.hh"
 #include "arch/x86/x86_traits.hh"
+#include "base/compiler.hh"
 #include "base/types.hh"
 
 namespace LittleEndianGuest {}
diff -r e47703369039 -r 54436a1784dc src/arch/x86/pagetable.hh
--- a/src/arch/x86/pagetable.hh Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/x86/pagetable.hh Wed Nov 09 14:27:40 2016 -0600
@@ -46,14 +46,13 @@
 #include <vector>
 
 #include "base/bitunion.hh"
-#include "base/misc.hh"
 #include "base/types.hh"
 #include "base/trie.hh"
-#include "cpu/thread_context.hh"
 #include "arch/x86/system.hh"
 #include "debug/MMU.hh"
 
 class Checkpoint;
+class ThreadContext;
 
 namespace X86ISA
 {
diff -r e47703369039 -r 54436a1784dc src/arch/x86/process.cc
--- a/src/arch/x86/process.cc   Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/x86/process.cc   Wed Nov 09 14:27:40 2016 -0600
@@ -59,6 +59,7 @@
 #include "mem/page_table.hh"
 #include "sim/process_impl.hh"
 #include "sim/syscall_desc.hh"
+#include "sim/syscall_return.hh"
 #include "sim/system.hh"
 
 using namespace std;
diff -r e47703369039 -r 54436a1784dc src/arch/x86/pseudo_inst.cc
--- a/src/arch/x86/pseudo_inst.cc       Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/x86/pseudo_inst.cc       Wed Nov 09 14:27:40 2016 -0600
@@ -31,9 +31,10 @@
 #include "arch/x86/pseudo_inst.hh"
 
 #include "arch/x86/system.hh"
+#include "cpu/thread_context.hh"
 #include "debug/PseudoInst.hh"
+#include "mem/se_translating_port_proxy.hh"
 #include "sim/process.hh"
-#include "sim/system.hh"
 
 using namespace X86ISA;
 
diff -r e47703369039 -r 54436a1784dc src/arch/x86/system.cc
--- a/src/arch/x86/system.cc    Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/x86/system.cc    Wed Nov 09 14:27:40 2016 -0600
@@ -39,19 +39,12 @@
 
 #include "arch/x86/system.hh"
 
-#include "arch/vtophys.hh"
 #include "arch/x86/bios/intelmp.hh"
 #include "arch/x86/bios/smbios.hh"
 #include "arch/x86/isa_traits.hh"
-#include "arch/x86/regs/misc.hh"
-#include "base/intmath.hh"
 #include "base/loader/object_file.hh"
-#include "base/loader/symtab.hh"
-#include "base/trace.hh"
 #include "cpu/thread_context.hh"
-#include "mem/port_proxy.hh"
 #include "params/X86System.hh"
-#include "sim/byteswap.hh"
 
 using namespace LittleEndianGuest;
 using namespace X86ISA;
diff -r e47703369039 -r 54436a1784dc src/arch/x86/system.hh
--- a/src/arch/x86/system.hh    Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/x86/system.hh    Wed Nov 09 14:27:40 2016 -0600
@@ -44,11 +44,7 @@
 #include <vector>
 
 #include "arch/x86/regs/misc.hh"
-#include "base/loader/symtab.hh"
-#include "cpu/pc_event.hh"
-#include "kern/system_events.hh"
 #include "params/X86System.hh"
-#include "sim/sim_object.hh"
 #include "sim/system.hh"
 
 namespace X86ISA
diff -r e47703369039 -r 54436a1784dc src/arch/x86/tlb.cc
--- a/src/arch/x86/tlb.cc       Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/x86/tlb.cc       Wed Nov 09 14:27:40 2016 -0600
@@ -45,17 +45,13 @@
 #include "arch/generic/mmapped_ipr.hh"
 #include "arch/x86/faults.hh"
 #include "arch/x86/insts/microldstop.hh"
-#include "arch/x86/pagetable.hh"
 #include "arch/x86/pagetable_walker.hh"
 #include "arch/x86/regs/misc.hh"
 #include "arch/x86/regs/msr.hh"
 #include "arch/x86/x86_traits.hh"
-#include "base/bitfield.hh"
 #include "base/trace.hh"
-#include "cpu/base.hh"
 #include "cpu/thread_context.hh"
 #include "debug/TLB.hh"
-#include "mem/packet_access.hh"
 #include "mem/page_table.hh"
 #include "mem/request.hh"
 #include "sim/full_system.hh"
diff -r e47703369039 -r 54436a1784dc src/arch/x86/tlb.hh
--- a/src/arch/x86/tlb.hh       Fri Jan 20 14:12:58 2017 -0500
+++ b/src/arch/x86/tlb.hh       Wed Nov 09 14:27:40 2016 -0600
@@ -41,20 +41,15 @@
 #define __ARCH_X86_TLB_HH__
 
 #include <list>
-#include <string>
 #include <vector>
 
 #include "arch/generic/tlb.hh"
-#include "arch/x86/regs/segment.hh"
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