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(Updated Feb. 5, 2017, 1:54 p.m.) Review request for Default. Summary (updated) ----------------- misc: Clean up and complete the gem5<->SystemC-TLM bridge [7/10] Repository: gem5 Description (updated) ------- Changeset 11800:b5ad6c483119 --------------------------- misc: Clean up and complete the gem5<->SystemC-TLM bridge [7/10] The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Implement 'pipe through' for gem5 Packets (see explanation below) Basically, this patch ensures that all transactions that originated in the gem5 world are converted back to the original packet when entering the gem5 world. So far, this only worked for packets that are responded to by a SyctemC component (e.g. when a gem5 CPU sends a request to a SystemC memory). By implementing the 'pipe through' this patch ensures, that packets that are responded to by a gem5 component (e.g. when a gem5 CPU sends a request to a gem5 memory via a SystemC interconnect) are handled properly. Diffs ----- util/tlm/sc_ext.hh c10c50cb8ac9 util/tlm/sc_ext.cc c10c50cb8ac9 util/tlm/sc_master_port.hh PRE-CREATION util/tlm/sc_master_port.cc PRE-CREATION util/tlm/sc_slave_port.cc PRE-CREATION Diff: http://reviews.gem5.org/r/3796/diff/ Testing ------- Thanks, Christian Menard _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
