Hi Everyone, I have a series of changes that add support for VirtIO over a memory-mapped device [1]. To avoid making the device ARM-specific, I needed to add an interrupt adaptor [2] that interfaces between an interrupt source and an interrupt controller. PCI devices use a platform-specific host interface that solves the same problem, but there is currently no solution for plain memory mapped devices.
Another issue that is solved by the new interrupt adaptor is the case where the system architecture exposes multiple types of interrupts. Specifically, ARM interrupt controllers have the notion of private peripheral interrupts (PPIs) that are CPU-specific and system-wide shared peripheral interrupts (SPIs). Previously, devices had to interface directly with the interrupt controller and be aware of the interrupt types. This is undesirable for devices that can generate either a PPI or an SPI (e.g., the PMU). The interrupt adaptor solves this problem by using different adaptor implementations for SPIs and PPIs (see [3]). I would appreciate if someone with experience of other architectures could have a look at the generic interface [2] to make sure I'm not doing anything stupid. Thanks, Andreas [1] https://gem5-review.googlesource.com/#/q/topic:virtio/mmio+(status:open+OR+status:merged) [2] https://gem5-review.googlesource.com/#/c/2520/ [3] https://gem5-review.googlesource.com/#/c/2521/ IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
