The email below has an incorrect link to the change in question. The
correct one is: https://gem5-review.googlesource.com/#/c/3760/
//Andreas
On 14/06/2017 15:22, Andreas Sandberg wrote:
Hi Yasir,
We decided to disable these gem5-specific extensions by default due to
reliability issues with newer kernels. Additionally, we don't want
people to rely in these extensions since they require a modified Linux
kernel.
You can enable the extensions by overriding the param in your own
simulation scripts.
If your setup stopped working after we disabled the extensions, there
is probably some other timing-related issue in your system. We are
aware of an issue that sometimes affects some spin lock
implementations and have posted a fix [1] for review.
Cheers,
Andreas
[1] http://ds-gerrit.euhpc.arm.com:8008/#/c/89516/
On 24/05/2017 14:50, Qureshi Yasir Mahmood wrote:
Hello,
Can someone please explain the reason to disable GEM5 GIC extensions
as in this update ?
I am asking because, I am using Linux kernel v4.3 with Ubuntu 16.04
for ARM FS simulation. So before this change everything was working
fine for me, but after this, the system does not boot up.
Regards
Yasir
-----Original Message-----
From: gem5-dev [mailto:[email protected]] On Behalf Of Curtis
Dunham
Sent: 22 September 2016 15:48
To: [email protected]
Subject: [gem5-dev] changeset in gem5: arm: disable GIC extensions
changeset 2c111e634da0 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=2c111e634da0
description:
arm: disable GIC extensions
Change-Id: If19b9c593b48ded1ea848f2d3710d4369ec8a221
Reviewed-by: Andreas Sandberg <[email protected]>
diffstat:
src/dev/arm/Gic.py | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diffs (12 lines):
diff -r d000cf4157ae -r 2c111e634da0 src/dev/arm/Gic.py
--- a/src/dev/arm/Gic.py Thu Sep 22 12:10:47 2016 +0100
+++ b/src/dev/arm/Gic.py Thu Sep 22 14:46:37 2016 +0100
@@ -59,7 +59,7 @@
cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu
interface")
int_latency = Param.Latency('10ns', "Delay for interrupt to get
to CPU")
it_lines = Param.UInt32(128, "Number of interrupt lines
supported (max = 1020)")
- gem5_extensions = Param.Bool(True, "Enable gem5 extensions")
+ gem5_extensions = Param.Bool(False, "Enable gem5 extensions")
class Gicv2mFrame(SimObject):
type = 'Gicv2mFrame'
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
IMPORTANT NOTICE: The contents of this email and any attachments are
confidential and may also be privileged. If you are not the intended recipient,
please notify the sender immediately and do not disclose the contents to any
other person, use it for any purpose, or store or copy the information in any
medium. Thank you.
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
