Alec Roelke has uploaded a new patch set (#4). (
https://gem5-review.googlesource.com/3800 )
Change subject: arch-riscv: Restructure ISA description
......................................................................
arch-riscv: Restructure ISA description
This patch restructures the RISC-V ISA description to use fewer classes
and improve its ability to be extended with nonstandard extensions in
the future. It also cleans up the disassembly for some of the CSR and
system instructions by removing source and destination registers for
instructions that don't have any.
[Fix class UImmOp to have an "imm" member rather than "uimm".]
[Update disassembly generation for new RegId class.]
Change-Id: Iec1c782020126e5e8e73460b84e31c7b5a5971d9
---
M src/arch/riscv/isa.cc
M src/arch/riscv/isa.hh
M src/arch/riscv/isa/base.isa
M src/arch/riscv/isa/bitfields.isa
M src/arch/riscv/isa/decoder.isa
M src/arch/riscv/isa/formats/amo.isa
M src/arch/riscv/isa/formats/basic.isa
M src/arch/riscv/isa/formats/formats.isa
M src/arch/riscv/isa/formats/fp.isa
M src/arch/riscv/isa/formats/mem.isa
A src/arch/riscv/isa/formats/standard.isa
D src/arch/riscv/isa/formats/type.isa
M src/arch/riscv/isa/includes.isa
M src/arch/riscv/registers.hh
M src/arch/riscv/utility.hh
15 files changed, 738 insertions(+), 684 deletions(-)
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Iec1c782020126e5e8e73460b84e31c7b5a5971d9
Gerrit-Change-Number: 3800
Gerrit-PatchSet: 4
Gerrit-Owner: Alec Roelke <ar...@virginia.edu>
Gerrit-Reviewer: Alec Roelke <ar...@virginia.edu>
Gerrit-CC: Jason Lowe-Power <ja...@lowepower.com>
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