Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/3961 )
Change subject: dev-arm: Add ID registers to the GIC model
......................................................................
dev-arm: Add ID registers to the GIC model
Implement GICD_IIDR, GICC_IIDR, GICD_PIDR0, GICD_PIDR1, GICD_PIDR2,
and GICD_PIDR3.
Change-Id: I4f6b5a6303907226e7d8e2f677543b3868c02e7b
Signed-off-by: Andreas Sandberg <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/3961
---
M src/dev/arm/gic_pl390.cc
M src/dev/arm/gic_pl390.hh
2 files changed, 26 insertions(+), 1 deletion(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
diff --git a/src/dev/arm/gic_pl390.cc b/src/dev/arm/gic_pl390.cc
index 93aaf5c..126431f 100644
--- a/src/dev/arm/gic_pl390.cc
+++ b/src/dev/arm/gic_pl390.cc
@@ -258,6 +258,18 @@
return (((sys->numRunningContexts() - 1) << 5) |
(itLines/INT_BITS_MAX -1) |
(haveGem5Extensions ? 0x100 : 0x0));
+ case GICD_PIDR0:
+ //ARM defined DevID
+ return (GICD_400_PIDR_VALUE & 0xFF);
+ case GICD_PIDR1:
+ return ((GICD_400_PIDR_VALUE >> 8) & 0xFF);
+ case GICD_PIDR2:
+ return ((GICD_400_PIDR_VALUE >> 16) & 0xFF);
+ case GICD_PIDR3:
+ return ((GICD_400_PIDR_VALUE >> 24) & 0xFF);
+ case GICD_IIDR:
+ /* revision id is resorted to 1 and variant to 0*/
+ return GICD_400_IIDR_VALUE;
default:
panic("Tried to read Gic distributor at offset %#x\n", daddr);
break;
@@ -287,7 +299,7 @@
{
switch(daddr) {
case GICC_IIDR:
- return 0;
+ return GICC_400_IIDR_VALUE;
case GICC_CTLR:
return cpuEnabled[ctx];
case GICC_PMR:
diff --git a/src/dev/arm/gic_pl390.hh b/src/dev/arm/gic_pl390.hh
index 3b35b59..60d9ae3 100644
--- a/src/dev/arm/gic_pl390.hh
+++ b/src/dev/arm/gic_pl390.hh
@@ -67,10 +67,23 @@
GICD_TYPER = 0x004, // controller type
GICD_IIDR = 0x008, // implementer id
GICD_SGIR = 0xf00, // software generated interrupt
+ GICD_PIDR0 = 0xfe0, // distributor peripheral ID0
+ GICD_PIDR1 = 0xfe4, // distributor peripheral ID1
+ GICD_PIDR2 = 0xfe8, // distributor peripheral ID2
+ GICD_PIDR3 = 0xfec, // distributor peripheral ID3
DIST_SIZE = 0xfff
};
+ /**
+ * As defined in:
+ * "ARM Generic Interrupt Controller Architecture" version 2.0
+ * "CoreLink GIC-400 Generic Interrupt Controller" revision r0p1
+ */
+ static constexpr uint32_t GICD_400_PIDR_VALUE = 0x002bb490;
+ static constexpr uint32_t GICD_400_IIDR_VALUE = 0x200143B;
+ static constexpr uint32_t GICC_400_IIDR_VALUE = 0x202143B;
+
static const AddrRange GICD_IGROUPR; // interrupt group
(unimplemented)
static const AddrRange GICD_ISENABLER; // interrupt set enable
static const AddrRange GICD_ICENABLER; // interrupt clear enable
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: I4f6b5a6303907226e7d8e2f677543b3868c02e7b
Gerrit-Change-Number: 3961
Gerrit-PatchSet: 3
Gerrit-Owner: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
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