[gem5-dev] Change in public/gem5[master]: riscv: Switch from M5_VAR_USED to just const.

[Gabe Black (Gerrit)]

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/4061

Change subject: riscv: Switch from M5_VAR_USED to just const.
......................................................................

riscv: Switch from M5_VAR_USED to just const.

A recent change added M5_VAR_USED attributes to some variables in
src/arch/riscv/registers.hh to fix a compiler error about those constants
being declared but then not used. That did fix the problem, but it made the
declarations a little more clunky and used a somewhat non-standard  
mechanism,
hidden behind the M5_VAR_USED macro.

Instead, if the constant definitions are reorganized slightly so that they
aren't defined based on the contents of vectors (the vectors are based on
the constants) then the compiler is also satisfied.

Because the SyscallNumReg didn't seem to have any direct relationship with
the ArgumentRegs by definition or otherwise, it was just defined to be the
constant 17 instead of whatever the 8th ArgumentReg happened to be.

Change-Id: I682f1ea3f22ffc09f710eb6bb99acd0de6f394d7
---
M src/arch/riscv/registers.hh
1 file changed, 4 insertions(+), 4 deletions(-)



diff --git a/src/arch/riscv/registers.hh b/src/arch/riscv/registers.hh
index 114d7e9..ba811b0 100644
--- a/src/arch/riscv/registers.hh
+++ b/src/arch/riscv/registers.hh
@@ -92,8 +92,8 @@
 const int GlobalPointerReg = 3;
 const int ThreadPointerReg = 4;
 const int FramePointerReg = 8;
-const std::vector<int> ReturnValueRegs = {10, 11};
-const int ReturnValueReg M5_VAR_USED = ReturnValueRegs[0];
+const int ReturnValueReg = 10;
+const std::vector<int> ReturnValueRegs = {ReturnValueReg, 11};
 const std::vector<int> ArgumentRegs = {10, 11, 12, 13, 14, 15, 16, 17};
 const int AMOTempReg = 32;

@@ -118,10 +118,10 @@
     "ft8", "ft9", "ft10", "ft11"
 };

-const int SyscallNumReg M5_VAR_USED = ArgumentRegs[7];
+const int SyscallNumReg = 17;
 const std::vector<int> SyscallArgumentRegs = {ArgumentRegs[0],  
ArgumentRegs[1],
     ArgumentRegs[2], ArgumentRegs[3]};
-const int SyscallPseudoReturnReg M5_VAR_USED = ReturnValueRegs[0];
+const int SyscallPseudoReturnReg = ReturnValueReg;

 enum MiscRegIndex {
     MISCREG_USTATUS = 0x000,

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I682f1ea3f22ffc09f710eb6bb99acd0de6f394d7
Gerrit-Change-Number: 4061
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabebl...@google.com>
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