Hello Gabor Dozsa,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/4200
to review the following change.
Change subject: config: Change mem_range attribute naming in ARM
SimpleSystem
......................................................................
config: Change mem_range attribute naming in ARM SimpleSystem
MemConfig.config() expects memory ranges to be defined in a particular
way. This patch changes the naming of the mem_range attribute in
SympleSystem to enable use of MemConfig for configuring the memory.
Change-Id: I4964c136e53a99c69ff5e086cacb929aa435168d
Signed-off-by: Gabor Dozsa <[email protected]>
Signed-off-by: Andreas Sandberg <[email protected]>
---
M configs/example/arm/devices.py
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/configs/example/arm/devices.py b/configs/example/arm/devices.py
index f7375cd..467d2b9 100644
--- a/configs/example/arm/devices.py
+++ b/configs/example/arm/devices.py
@@ -209,13 +209,13 @@
mem_range = self.realview._mem_regions[0]
mem_range_size = long(mem_range[1]) - long(mem_range[0])
assert mem_range_size >= long(Addr(mem_size))
- self._mem_range = AddrRange(start=mem_range[0], size=mem_size)
+ self.mem_ranges = [ AddrRange(start=mem_range[0], size=mem_size) ]
self._caches = caches
if self._caches:
- self.iocache = IOCache(addr_ranges=[self._mem_range])
+ self.iocache = IOCache(addr_ranges=[self.mem_ranges[0]])
else:
self.dmabridge = Bridge(delay='50ns',
- ranges=[self._mem_range])
+ ranges=[self.mem_ranges[0]])
self._pci_devices = 0
self._clusters = []
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4964c136e53a99c69ff5e086cacb929aa435168d
Gerrit-Change-Number: 4200
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Gabor Dozsa <[email protected]>
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