Hello Andreas Sandberg,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/5701
to look at the new patch set (#2).
Change subject: arch-arm: ISB instruction is not Serializing
......................................................................
arch-arm: ISB instruction is not Serializing
ISB instruction is not a Serializing Instruction: it is flushing the
pipeline (following instructions), but there is no guarantee for the
processor to complete all modifications to flags and general-purpose
registers by previous instructions before the next instruction is
executed. The correct behaviour is guaranteed by either a
preceeding sw DSB barrier or by gem5 IsSerializeAfter flag for
MCR instruction.
Change-Id: I05e61b4cf9f01113d95b1502c996d04cbd69b759
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com>
---
M src/arch/arm/isa/insts/misc.isa
M src/arch/arm/isa/insts/misc64.isa
2 files changed, 2 insertions(+), 2 deletions(-)
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I05e61b4cf9f01113d95b1502c996d04cbd69b759
Gerrit-Change-Number: 5701
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Assignee: Giacomo Gabrielli <giacomo.gabrie...@arm.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-CC: Giacomo Gabrielli <giacomo.gabrie...@arm.com>
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