Gabe Black has submitted this change and it was merged. (
https://gem5-review.googlesource.com/5464 )
Change subject: sparc: Pull the unimplemented formats out of the ISA
description.
......................................................................
sparc: Pull the unimplemented formats out of the ISA description.
These are simple classes which don't need to be in the ISA description.
Change-Id: Ia0bb45f50c4da2536855efcb3c17c7780b431332
Reviewed-on: https://gem5-review.googlesource.com/5464
Reviewed-by: Gabe Black <gabebl...@google.com>
Maintainer: Gabe Black <gabebl...@google.com>
---
A src/arch/sparc/insts/unimp.hh
M src/arch/sparc/isa/formats/unimp.isa
M src/arch/sparc/isa/includes.isa
3 files changed, 123 insertions(+), 98 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved; Looks good to me, approved
diff --git a/src/arch/sparc/insts/unimp.hh b/src/arch/sparc/insts/unimp.hh
new file mode 100644
index 0000000..c0d9785
--- /dev/null
+++ b/src/arch/sparc/insts/unimp.hh
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Steve Reinhardt
+ */
+
+#ifndef __ARCH_SPARC_INSTS_UNIMP_HH__
+#define __ARCH_SPARC_INSTS_UNIMP_HH__
+
+#include "arch/sparc/insts/static_inst.hh"
+#include "base/cprintf.hh"
+
+namespace SparcISA
+{
+
+////////////////////////////////////////////////////////////////////
+//
+// Unimplemented instructions
+//
+
+/**
+ * Static instruction class for unimplemented instructions that
+ * cause simulator termination. Note that these are recognized
+ * (legal) instructions that the simulator does not support; the
+ * 'Unknown' class is used for unrecognized/illegal instructions.
+ * This is a leaf class.
+ */
+class FailUnimplemented : public SparcStaticInst
+{
+ public:
+ /// Constructor
+ FailUnimplemented(const char *_mnemonic, ExtMachInst _machInst) :
+ SparcStaticInst(_mnemonic, _machInst, No_OpClass)
+ {
+ // don't call execute() (which panics) if we're on a
+ // speculative path
+ flags[IsNonSpeculative] = true;
+ }
+
+ Fault
+ execute(ExecContext *xc, Trace::InstRecord *traceData) const override
+ {
+ panic("attempt to execute unimplemented instruction '%s' "
+ "(inst 0x%08x)", mnemonic, machInst);
+ }
+
+ std::string
+ generateDisassembly(Addr pc, const SymbolTable *symtab) const override
+ {
+ return csprintf("%-10s (unimplemented)", mnemonic);
+ }
+};
+
+/**
+ * Base class for unimplemented instructions that cause a warning
+ * to be printed (but do not terminate simulation). This
+ * implementation is a little screwy in that it will print a
+ * warning for each instance of a particular unimplemented machine
+ * instruction, not just for each unimplemented opcode. Should
+ * probably make the 'warned' flag a static member of the derived
+ * class.
+ */
+class WarnUnimplemented : public SparcStaticInst
+{
+ private:
+ /// Have we warned on this instruction yet?
+ mutable bool warned;
+
+ public:
+ /// Constructor
+ WarnUnimplemented(const char *_mnemonic, ExtMachInst _machInst) :
+ SparcStaticInst(_mnemonic, _machInst, No_OpClass),
warned(false)
+ {
+ // don't call execute() (which panics) if we're on a
+ // speculative path
+ flags[IsNonSpeculative] = true;
+ }
+
+ Fault
+ execute(ExecContext *xc, Trace::InstRecord *traceData) const override
+ {
+ if (!warned) {
+ warn("instruction '%s' unimplemented\n", mnemonic);
+ warned = true;
+ }
+ return NoFault;
+ }
+
+ std::string
+ generateDisassembly(Addr pc, const SymbolTable *symtab) const override
+ {
+ return csprintf("%-10s (unimplemented)", mnemonic);
+ }
+};
+
+}
+
+#endif // __ARCH_SPARC_INSTS_UNIMP_HH__
diff --git a/src/arch/sparc/isa/formats/unimp.isa
b/src/arch/sparc/isa/formats/unimp.isa
index aa03c92..b23d821 100644
--- a/src/arch/sparc/isa/formats/unimp.isa
+++ b/src/arch/sparc/isa/formats/unimp.isa
@@ -33,104 +33,6 @@
// Unimplemented instructions
//
-output header {{
- /**
- * Static instruction class for unimplemented instructions that
- * cause simulator termination. Note that these are recognized
- * (legal) instructions that the simulator does not support; the
- * 'Unknown' class is used for unrecognized/illegal instructions.
- * This is a leaf class.
- */
- class FailUnimplemented : public SparcStaticInst
- {
- public:
- /// Constructor
- FailUnimplemented(const char *_mnemonic, ExtMachInst _machInst)
- : SparcStaticInst(_mnemonic, _machInst, No_OpClass)
- {
- // don't call execute() (which panics) if we're on a
- // speculative path
- flags[IsNonSpeculative] = true;
- }
-
- Fault execute(ExecContext *, Trace::InstRecord *) const;
-
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
- };
-
- /**
- * Base class for unimplemented instructions that cause a warning
- * to be printed (but do not terminate simulation). This
- * implementation is a little screwy in that it will print a
- * warning for each instance of a particular unimplemented machine
- * instruction, not just for each unimplemented opcode. Should
- * probably make the 'warned' flag a static member of the derived
- * class.
- */
- class WarnUnimplemented : public SparcStaticInst
- {
- private:
- /// Have we warned on this instruction yet?
- mutable bool warned;
-
- public:
- /// Constructor
- WarnUnimplemented(const char *_mnemonic, ExtMachInst _machInst)
- : SparcStaticInst(_mnemonic, _machInst, No_OpClass),
warned(false)
- {
- // don't call execute() (which panics) if we're on a
- // speculative path
- flags[IsNonSpeculative] = true;
- }
-
- Fault execute(ExecContext *, Trace::InstRecord *) const;
-
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
- };
-}};
-
-output decoder {{
- std::string
- FailUnimplemented::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- return csprintf("%-10s (unimplemented)", mnemonic);
- }
-
- std::string
- WarnUnimplemented::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- return csprintf("%-10s (unimplemented)", mnemonic);
- }
-}};
-
-output exec {{
- Fault
- FailUnimplemented::execute(ExecContext *xc,
- Trace::InstRecord *traceData) const
- {
- panic("attempt to execute unimplemented instruction '%s' "
- "(inst 0x%08x)", mnemonic, machInst);
- return NoFault;
- }
-
- Fault
- WarnUnimplemented::execute(ExecContext *xc,
- Trace::InstRecord *traceData) const
- {
- if (!warned) {
- warn("instruction '%s' unimplemented\n", mnemonic);
- warned = true;
- }
-
- return NoFault;
- }
-}};
-
-
def format FailUnimpl() {{
iop = InstObjParams(name, 'FailUnimplemented')
decode_block = BasicDecodeWithMnemonic.subst(iop)
diff --git a/src/arch/sparc/isa/includes.isa
b/src/arch/sparc/isa/includes.isa
index 9077f7c..4a94d2f 100644
--- a/src/arch/sparc/isa/includes.isa
+++ b/src/arch/sparc/isa/includes.isa
@@ -44,6 +44,7 @@
#include "arch/sparc/insts/priv.hh"
#include "arch/sparc/insts/static_inst.hh"
#include "arch/sparc/insts/trap.hh"
+#include "arch/sparc/insts/unimp.hh"
#include "arch/sparc/insts/unknown.hh"
#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/registers.hh"
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: Ia0bb45f50c4da2536855efcb3c17c7780b431332
Gerrit-Change-Number: 5464
Gerrit-PatchSet: 5
Gerrit-Owner: Gabe Black <gabebl...@google.com>
Gerrit-Assignee: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Gabe Black <gabebl...@google.com>
Gerrit-CC: Andreas Sandberg <andreas.sandb...@arm.com>
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