Andreas Sandberg has uploaded this change for review. (
https://gem5-review.googlesource.com/6101
Change subject: cpu-o3: Add missing vector stat initializers
......................................................................
cpu-o3: Add missing vector stat initializers
All of the O3 vector stats added by 'arch: ISA parser additions of
vector registers' are currently missing their stat initializers. Add
the missing stat initialization to InstructionQueue::regStats.
Change-Id: Idc4b8e2824120a2542d8a604340a1b41bde6aa28
Signed-off-by: Andreas Sandberg <[email protected]>
---
M src/cpu/o3/inst_queue_impl.hh
1 file changed, 20 insertions(+), 0 deletions(-)
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index 3da72fd..f70f662 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -369,6 +369,21 @@
.desc("Number of floating instruction queue wakeup accesses")
.flags(total);
+ vecInstQueueReads
+ .name(name() + ".vec_inst_queue_reads")
+ .desc("Number of vector instruction queue reads")
+ .flags(total);
+
+ vecInstQueueWrites
+ .name(name() + ".vec_inst_queue_writes")
+ .desc("Number of vector instruction queue writes")
+ .flags(total);
+
+ vecInstQueueWakeupAccesses
+ .name(name() + ".vec_inst_queue_wakeup_accesses")
+ .desc("Number of vector instruction queue wakeup accesses")
+ .flags(total);
+
intAluAccesses
.name(name() + ".int_alu_accesses")
.desc("Number of integer alu accesses")
@@ -379,6 +394,11 @@
.desc("Number of floating point alu accesses")
.flags(total);
+ vecAluAccesses
+ .name(name() + ".vec_alu_accesses")
+ .desc("Number of vector alu accesses")
+ .flags(total);
+
}
template <class Impl>
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Idc4b8e2824120a2542d8a604340a1b41bde6aa28
Gerrit-Change-Number: 6101
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg <[email protected]>
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