Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/8144


Change subject: arch-arm: Fix big endian support in do{Long,L1,L2}Descriptor
......................................................................

arch-arm: Fix big endian support in do{Long,L1,L2}Descriptor

do{Long,L1,L2}Descriptor was not able to load descriptors
correctly for big-endian situations, causing recognised
Descriptors.
Added big-endian related data conversions to correct them.

Change-Id: I0fdfbbdf56f94bbed19172acae1b6e4a0382b5a0
Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com>
---
M src/arch/arm/table_walker.cc
M src/arch/arm/utility.hh
M src/sim/byteswap.hh
3 files changed, 18 insertions(+), 0 deletions(-)



diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index 428556b..3c79e43 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -1423,6 +1423,9 @@
         return;
     }

+    currState->l1Desc.data = htog(currState->l1Desc.data,
+                                  byteOrder(currState->tc));
+
     DPRINTF(TLB, "L1 descriptor for %#x is %#x\n",
             currState->vaddr_tainted, currState->l1Desc.data);
     TlbEntry te;
@@ -1518,6 +1521,9 @@
         return;
     }

+    currState->longDesc.data = htog(currState->longDesc.data,
+                                    byteOrder(currState->tc));
+
     DPRINTF(TLB, "L%d descriptor for %#llx is %#llx (%s)\n",
             currState->longDesc.lookupLevel, currState->vaddr_tainted,
             currState->longDesc.data,
@@ -1709,6 +1715,9 @@
         return;
     }

+    currState->l2Desc.data = htog(currState->l2Desc.data,
+                                  byteOrder(currState->tc));
+
     DPRINTF(TLB, "L2 descriptor for %#x is %#x\n",
             currState->vaddr_tainted, currState->l2Desc.data);
     TlbEntry te;
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 8efe4ad..53431b9 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -348,6 +348,11 @@
  */
 uint8_t encodePhysAddrRange64(int pa_size);

+inline ByteOrder byteOrder(ThreadContext *tc)
+{
+    return isBigEndian64(tc)?BigEndianByteOrder:LittleEndianByteOrder;
+};
+
 }

 #endif
diff --git a/src/sim/byteswap.hh b/src/sim/byteswap.hh
index 2c3517f..4ed1f20 100644
--- a/src/sim/byteswap.hh
+++ b/src/sim/byteswap.hh
@@ -153,6 +153,10 @@
 #else
         #error Invalid Endianess
 #endif
+template <typename T> inline T htog(T value, ByteOrder guest_byte_order)
+{return (guest_byte_order==BigEndianByteOrder) ? htobe(value) : htole(value);}
+template <typename T> inline T gtoh(T value, ByteOrder guest_byte_order)
+{return (guest_byte_order==BigEndianByteOrder) ? betoh(value) : letoh(value);}

 namespace BigEndianGuest
 {

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I0fdfbbdf56f94bbed19172acae1b6e4a0382b5a0
Gerrit-Change-Number: 8144
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg <andreas.sandb...@arm.com>
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