Tuan Ta has uploaded this change for review. ( https://gem5-review.googlesource.com/8183


Change subject: riscv: remove NonSpeculative flag from fence inst
......................................................................

riscv: remove NonSpeculative flag from fence inst

Fence instruction origially had two flags NonSpeculative and
MemBarrier. In O3 model, MemBarrier instructions are inserted
into the instruction queue by the InstructionQueue::insertBarrier (at
src/cpu/o3/iew_impl.hh:1083). Barrier instructions are implicitly
assumed to be non-speculative.

Adding NonSpeculative flag to fence instruction makes it inserted into
the instruction queue twice (at src/cpu/o3/iew_impl.hh:1083 and :1111).
This can lead to a deadlock if both pointers to the instruction are not
cleared from the queue when the instruction retires.

This patch removes NonSpeculative flag from the fence inst.

Change-Id: I26573d12a0b52f43b73c0e51158286dc98d05ea4
---
M src/arch/riscv/isa/decoder.isa
1 file changed, 1 insertion(+), 1 deletion(-)



diff --git a/src/arch/riscv/isa/decoder.isa b/src/arch/riscv/isa/decoder.isa
index ecee161..62d5b9d 100644
--- a/src/arch/riscv/isa/decoder.isa
+++ b/src/arch/riscv/isa/decoder.isa
@@ -376,7 +376,7 @@
         0x03: decode FUNCT3 {
             format IOp {
                 0x0: fence({{
-                }}, uint64_t, IsNonSpeculative, IsMemBarrier, No_OpClass);
+                }}, uint64_t, IsMemBarrier, No_OpClass);
                 0x1: fence_i({{
}}, uint64_t, IsNonSpeculative, IsSerializeAfter, No_OpClass);
             }

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I26573d12a0b52f43b73c0e51158286dc98d05ea4
Gerrit-Change-Number: 8183
Gerrit-PatchSet: 1
Gerrit-Owner: Tuan Ta <q...@cornell.edu>
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