Robert Scheffel has uploaded this change for review. (
https://gem5-review.googlesource.com/9281
Change subject: arch-riscv: implement bare metal specific system class
......................................................................
arch-riscv: implement bare metal specific system class
A new system class was implemented, that manages
variables, which are only relevant for bare metal applications.
That will help to enable both, bare metal systems and later on linux
systems.
Change-Id: I379315bbea5042ae9f933ab24222a59b619b95a4
---
M src/arch/riscv/RiscvSystem.py
M src/arch/riscv/SConscript
A src/arch/riscv/bare_metal/system.cc
A src/arch/riscv/bare_metal/system.hh
M src/arch/riscv/system.cc
M src/arch/riscv/system.hh
6 files changed, 151 insertions(+), 49 deletions(-)
diff --git a/src/arch/riscv/RiscvSystem.py b/src/arch/riscv/RiscvSystem.py
index df0f964..89e6cf0 100644
--- a/src/arch/riscv/RiscvSystem.py
+++ b/src/arch/riscv/RiscvSystem.py
@@ -32,8 +32,15 @@
from m5.params import *
from System import System
+
class RiscvSystem(System):
type = 'RiscvSystem'
cxx_header = 'arch/riscv/system.hh'
- bootloader = Param.String("File, that contains the bootloader code")
+ resetVect = Param.Addr(0x0, 'Reset vector')
load_addr_mask = 0xFFFFFFFFFFFFFFFF
+
+
+class BareMetalRiscvSystem(RiscvSystem):
+ type = 'BareMetalRiscvSystem'
+ cxx_header = 'arch/riscv/bare_metal/system.hh'
+ bootloader = Param.String("File, that contains the bootloader code")
diff --git a/src/arch/riscv/SConscript b/src/arch/riscv/SConscript
index 2482414..2ddba72 100644
--- a/src/arch/riscv/SConscript
+++ b/src/arch/riscv/SConscript
@@ -62,6 +62,8 @@
Source('linux/process.cc')
Source('linux/linux.cc')
+ Source('bare_metal/system.cc')
+
SimObject('RiscvInterrupts.py')
SimObject('RiscvISA.py')
SimObject('RiscvTLB.py')
diff --git a/src/arch/riscv/bare_metal/system.cc
b/src/arch/riscv/bare_metal/system.cc
new file mode 100644
index 0000000..c8b3ad2
--- /dev/null
+++ b/src/arch/riscv/bare_metal/system.cc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2018 TU Dresden
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Robert Scheffel
+ */
+
+#include "arch/riscv/bare_metal/system.hh"
+
+#include "base/loader/object_file.hh"
+
+BareMetalRiscvSystem::BareMetalRiscvSystem(Params *p)
+ : RiscvSystem(p)
+{
+ bootloaderSymtab = new SymbolTable;
+
+ // load bootloader code into memory
+ bootloader = createObjectFile(p->bootloader);
+ if (bootloader == NULL) {
+ fatal("Could not load bootloader file %s", p->bootloader);
+ }
+
+ // load symbols
+ if (!bootloader->loadGlobalSymbols(bootloaderSymtab)) {
+ panic("Could not load bootloader symbols\n");
+ }
+
+ if (!bootloader->loadLocalSymbols(bootloaderSymtab)) {
+ panic("Could not load bootloader symbols\n");
+ }
+
+ _resetVect = bootloader->entryPoint();
+}
+
+BareMetalRiscvSystem::~BareMetalRiscvSystem()
+{
+ delete bootloaderSymtab;
+ delete bootloader;
+}
+
+void
+BareMetalRiscvSystem::initState()
+{
+ // Call the initialisation of the super class
+ RiscvSystem::initState();
+
+ // load program sections into memory
+ if (!bootloader->loadSections(physProxy)) {
+ warn("could not load sections to memory");
+ }
+}
+
+BareMetalRiscvSystem *
+BareMetalRiscvSystemParams::create()
+{
+ return new BareMetalRiscvSystem(this);
+}
diff --git a/src/arch/riscv/bare_metal/system.hh
b/src/arch/riscv/bare_metal/system.hh
new file mode 100644
index 0000000..d01c9b4
--- /dev/null
+++ b/src/arch/riscv/bare_metal/system.hh
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2018 TU Dresden
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Robert Scheffel
+ */
+
+#ifndef __ARCH_RISCV_BARE_METAL_SYSTEM_HH__
+#define __ARCH_RISCV_BARE_METAL_SYSTEM_HH__
+
+#include "arch/riscv/system.hh"
+#include "params/BareMetalRiscvSystem.hh"
+
+class BareMetalRiscvSystem : public RiscvSystem
+{
+ protected:
+ // bootloader object file
+ ObjectFile *bootloader;
+
+ // bootloader symbol table, not sure if needed
+ SymbolTable *bootloaderSymtab;
+
+ public:
+ typedef BareMetalRiscvSystemParams Params;
+ BareMetalRiscvSystem(Params *p);
+ ~BareMetalRiscvSystem();
+
+ // initialize the system
+ virtual void initState();
+
+ protected:
+ const Params *params() const { return (const Params *)_params; }
+};
+
+#endif // __ARCH_RISCV_BARE_METAL_SYSTEM_HH__
diff --git a/src/arch/riscv/system.cc b/src/arch/riscv/system.cc
index 425fe7c..c36aa99 100644
--- a/src/arch/riscv/system.cc
+++ b/src/arch/riscv/system.cc
@@ -1,7 +1,6 @@
/*
* Copyright (c) 2002-2005 The Regents of The University of Michigan
* Copyright (c) 2007 MIPS Technologies, Inc.
- * Copyright (c) 2018 TU Dresden
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -30,7 +29,6 @@
* Authors: Ali Saidi
* Nathan Binkert
* Jaidev Patwardhan
- * Robert Scheffel
*/
#include "arch/riscv/system.hh"
@@ -48,44 +46,12 @@
RiscvSystem::RiscvSystem(Params *p)
: System(p),
- _resetVect(0)
+ _resetVect(p->resetVect)
{
- bootloaderSymtab = new SymbolTable;
-
- // load bootloader code into memory
- bootloader = createObjectFile(p->bootloader);
- if (bootloader == NULL) {
- fatal("Could not load bootloader file %s", p->bootloader);
- }
-
- // load symbols
- if (!bootloader->loadGlobalSymbols(bootloaderSymtab)) {
- panic("Could not load bootloader symbols\n");
- }
-
- if (!bootloader->loadLocalSymbols(bootloaderSymtab)) {
- panic("Could not load bootloader symbols\n");
- }
-
- _resetVect = bootloader->entryPoint();
}
RiscvSystem::~RiscvSystem()
{
- delete bootloaderSymtab;
- delete bootloader;
-}
-
-void
-RiscvSystem::initState()
-{
- // Call the initialisation of the super class
- System::initState();
-
- // load program sections into memory
- if (!bootloader->loadSections(physProxy)) {
- warn("could not load sections to memory");
- }
}
/**
diff --git a/src/arch/riscv/system.hh b/src/arch/riscv/system.hh
index 4f3a2ac..4971a10 100644
--- a/src/arch/riscv/system.hh
+++ b/src/arch/riscv/system.hh
@@ -1,7 +1,6 @@
/*
* Copyright (c) 2002-2005 The Regents of The University of Michigan
* Copyright (c) 2007 MIPS Technologies, Inc.
- * Copyright (c) 2018 TU Dresden
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -30,7 +29,6 @@
* Authors: Ali Saidi
* Nathan Binkert
* Jaidev Patwardhan
- * Robert Scheffel
*/
#ifndef __ARCH_RISCV_SYSTEM_HH__
@@ -50,12 +48,6 @@
class RiscvSystem : public System
{
protected:
- // bootloader object file
- ObjectFile *bootloader;
-
- // bootloader symbol table, not sure if needed
- SymbolTable *bootloaderSymtab;
-
// entry point for simulation
Addr _resetVect;
@@ -64,17 +56,14 @@
RiscvSystem(Params *p);
~RiscvSystem();
- // initialize the system
- virtual void initState();
-
- virtual bool breakpoint();
-
// return reset address
Addr resetVect() const { return _resetVect; }
// return reset address of thread context
static Addr resetVect(ThreadContext* tc);
+ virtual bool breakpoint();
+
public:
/**
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I379315bbea5042ae9f933ab24222a59b619b95a4
Gerrit-Change-Number: 9281
Gerrit-PatchSet: 1
Gerrit-Owner: Robert Scheffel <robert.scheff...@tu-dresden.de>
Gerrit-MessageType: newchange
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