Hello Giacomo Travaglini,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/10810
to review the following change.
Change subject: dev-arm: Remove deprecated GIC test interfaces
......................................................................
dev-arm: Remove deprecated GIC test interfaces
Change-Id: I4c5203b216387d9a4f041c7a00caea926e5cfca6
Signed-off-by: Andreas Sandberg <[email protected]>
Reviewed-by: Giacomo Travaglini <[email protected]>
---
M src/dev/arm/gic_pl390.cc
M src/dev/arm/gic_pl390.hh
2 files changed, 0 insertions(+), 54 deletions(-)
diff --git a/src/dev/arm/gic_pl390.cc b/src/dev/arm/gic_pl390.cc
index 4818be6..f918f77 100644
--- a/src/dev/arm/gic_pl390.cc
+++ b/src/dev/arm/gic_pl390.cc
@@ -76,7 +76,6 @@
cpuSgiPending {}, cpuSgiActive {},
cpuSgiPendingExt {}, cpuSgiActiveExt {},
cpuPpiPending {}, cpuPpiActive {},
- irqEnable(false),
pendingDelayedInterrupts(0)
{
for (int x = 0; x < CPU_MAX; x++) {
@@ -916,7 +915,6 @@
SERIALIZE_ARRAY(cpuSgiPendingExt, CPU_MAX);
SERIALIZE_ARRAY(cpuPpiActive, CPU_MAX);
SERIALIZE_ARRAY(cpuPpiPending, CPU_MAX);
- SERIALIZE_SCALAR(irqEnable);
SERIALIZE_SCALAR(gem5ExtensionsEnabled);
for (uint32_t i=0; i < bankedRegs.size(); ++i) {
@@ -959,7 +957,6 @@
UNSERIALIZE_ARRAY(cpuSgiPendingExt, CPU_MAX);
UNSERIALIZE_ARRAY(cpuPpiActive, CPU_MAX);
UNSERIALIZE_ARRAY(cpuPpiPending, CPU_MAX);
- UNSERIALIZE_SCALAR(irqEnable);
// Handle checkpoints from before we drained the GIC to prevent
// in-flight interrupts.
@@ -998,42 +995,3 @@
{
return new Pl390(this);
}
-
-/* Functions for debugging and testing */
-void
-Pl390::driveSPI(uint32_t spiVect)
-{
- DPRINTF(GIC, "Received SPI Vector:%x Enable: %d\n", spiVect,
irqEnable);
- getPendingInt(0, 1) |= spiVect;
- if (irqEnable && enabled) {
- updateIntState(-1);
- }
-}
-
-void
-Pl390::driveIrqEn( bool state)
-{
- irqEnable = state;
- DPRINTF(GIC, " Enabling Irq\n");
- updateIntState(-1);
-}
-
-void
-Pl390::driveLegIRQ(bool state)
-{
- if (irqEnable && !(!enabled && cpuEnabled[0])) {
- if (state) {
- DPRINTF(GIC, "Driving Legacy Irq\n");
- platform->intrctrl->post(0, ArmISA::INT_IRQ, 0);
- }
- else platform->intrctrl->clear(0, ArmISA::INT_IRQ, 0);
- }
-}
-
-void
-Pl390::driveLegFIQ(bool state)
-{
- if (state)
- platform->intrctrl->post(0, ArmISA::INT_FIQ, 0);
- else platform->intrctrl->clear(0, ArmISA::INT_FIQ, 0);
-}
diff --git a/src/dev/arm/gic_pl390.hh b/src/dev/arm/gic_pl390.hh
index 58d8434..dc45d25 100644
--- a/src/dev/arm/gic_pl390.hh
+++ b/src/dev/arm/gic_pl390.hh
@@ -320,9 +320,6 @@
uint32_t cpuPpiPending[CPU_MAX];
uint32_t cpuPpiActive[CPU_MAX];
- /** IRQ Enable Used for debug */
- bool irqEnable;
-
/** software generated interrupt
* @param data data to decode that indicates which cpus to interrupt
*/
@@ -392,15 +389,6 @@
void sendPPInt(uint32_t num, uint32_t cpu) override;
void clearPPInt(uint32_t num, uint32_t cpu) override;
- public: // Test & debug intefaces
- /** @{ */
- /* Various functions fer testing and debugging */
- void driveSPI(uint32_t spi);
- void driveLegIRQ(bool state);
- void driveLegFIQ(bool state);
- void driveIrqEn(bool state);
- /** @} */
-
protected:
/** Handle a read to the distributor portion of the GIC
* @param pkt packet to respond to
--
To view, visit https://gem5-review.googlesource.com/10810
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I4c5203b216387d9a4f041c7a00caea926e5cfca6
Gerrit-Change-Number: 10810
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-MessageType: newchange
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