Hi Giacomo. Some of the register accessor functions (maybe all of them?) used to return Fault objects, but I changed them to be like they are now a long time ago. I don't remember exactly what the reason was, just that I had one and made the switch. I can try to find some info about why. Please wait until I've had a chance to remind myself so I can comment intelligently about whether it makes sense to switch back.
Gabe On Thu, Jun 7, 2018 at 5:55 AM Giacomo Travaglini < giacomo.travagl...@arm.com> wrote: > Hi all, > > > > It's been a while that I am lingering about the idea of proposing a > signature change for the ISAs MiscReg setter: > > > > What it currently is: > > > > * void setMiscReg(int misc_reg, const MiscReg &val); > > > > What I would like to have: > > > > * Fault setMiscReg(int misc_reg, const MiscReg &val); > > > > IMO this will improve system register access design, and will make it > easier to cover cases where the access to a System register produces a a > fault as a side effect. > > This could be for instance a register access that is trapped or the > setting of a particular Bit in a system register which triggers an > exception. > > > > At the moment the current signature imposes us to have multiple table > walks for a specific > > MiscReg number: when writing a system register I have to do the following > calls (this is ISA agnostic pseudocode) > > > > 1) checkIfTraps(miscreg_number); > > > > Which will be implemented more or less in this way: > > > > Switch(miscreg_number) { > > Case MISCREG_1: > > // return boolean or fault if trapping > > Case MISCREG_2: > > […] > > } > > > 2) setMiscReg(miscreg_number, val); > > > > Which will be implemented more or less in this way: > > > > Switch(miscreg_number) { > > Case MISCREG_1: > > // Here I do the register masking for writing > > Case MISCREG_2: > > […] > > } > > > This could be inefficient because you have to traverse switch cases twice. > This is even more > > True if the exception is generated by the write of a specific value in a > bitfield: other problems arise > > If you have to generate the fault but still perform a register write. > > > Switching to > > > > Fault setMiscReg(int misc_reg, const MiscReg &val); > > > > Will be more callback oriented and solve the issue: > > > > Do you have any thoughts about this? I'd like to have your opinion before > > I start working on this big change. > > > Thanks > > > Giacomo Travaglini > > IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > _______________________________________________ > gem5-dev mailing list > gem5-dev@gem5.org > http://m5sim.org/mailman/listinfo/gem5-dev _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev