Take a look at: src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_non_temporal.py
For an example. Gabe On Mon, Jul 9, 2018 at 4:29 AM Gabe Black <[email protected]> wrote: > Hi Le. I just checked, and the MOVNTI instruction doesn't have any special > handling to tell it to be non-temporal. I think relatively recently there > was a flag added which lets you specify a memory operation as uncacheable. > I'm not sure if the semantics would match perfectly, but that could make > the instructions behave more like what you expect. > > Gabe > > On Fri, Jul 6, 2018 at 5:31 AM dongle <[email protected]> wrote: > >> Dear all, >> >> I run a program that calls non-temporal store instructions (e.g., movnti) >> in SE module after building build/X86/gem5.opt. Non-temporal store >> instructions should bypass CPU cache and directly store data from register >> to memory. However, I find that they still write data to CPU cache. Could >> you check this? >> >> Best Regards, >> Le >> _______________________________________________ >> gem5-dev mailing list >> [email protected] >> http://m5sim.org/mailman/listinfo/gem5-dev > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
