Daniel Carvalho has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/12724
Change subject: mem-cache: Fix non-bijective function in Skewed caches
......................................................................
mem-cache: Fix non-bijective function in Skewed caches
The hash() function must be bijective for the skewed caches to work,
however when the hashing is done on top of a one-bit address, the
MSB and LSB refer to the same bit, and therefore their xor will
always be zero.
This patch adds a fatal error to not allow the user to set an invalid
value for the number of sets that would generate that bug.
As a side note, the missing header for the bitfields functions has
been added.
Change-Id: I35a03ac5fdc4debb091f7f2db5db33568d0b0021
---
M src/mem/cache/tags/skewed_assoc.cc
M src/mem/cache/tags/skewed_assoc.hh
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/src/mem/cache/tags/skewed_assoc.cc
b/src/mem/cache/tags/skewed_assoc.cc
index 044f8a3..b3945d0 100644
--- a/src/mem/cache/tags/skewed_assoc.cc
+++ b/src/mem/cache/tags/skewed_assoc.cc
@@ -37,6 +37,7 @@
#include <vector>
+#include "base/bitfield.hh"
#include "base/logging.hh"
SkewedAssoc::SkewedAssoc(const Params *p)
@@ -51,6 +52,10 @@
// skewing functions accordingly to make good use of the hashing
function
panic_if(setShift + 2 * (msbShift + 1) > 64, "Unsuported number of
bits " \
"for the skewing functions.");
+
+ // We must have more than two sets, otherwise the MSB and LSB are the
same
+ // bit, and the xor of them will always be 0
+ fatal_if(numSets <= 2, "The number of sets must be greater than 2");
}
Addr
diff --git a/src/mem/cache/tags/skewed_assoc.hh
b/src/mem/cache/tags/skewed_assoc.hh
index 7f5a752..9fc39e2 100644
--- a/src/mem/cache/tags/skewed_assoc.hh
+++ b/src/mem/cache/tags/skewed_assoc.hh
@@ -73,6 +73,9 @@
* applies an XOR to the MSB and LSB, shifts all bits one bit to the
right,
* and set the result of the XOR as the new MSB.
*
+ * This function is not bijective if the address has only 1 bit, as
the MSB
+ * and LSB will be the same, and therefore the xor will always be 0.
+ *
* @param addr The address to be hashed.
* @param The hashed address.
*/
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I35a03ac5fdc4debb091f7f2db5db33568d0b0021
Gerrit-Change-Number: 12724
Gerrit-PatchSet: 1
Gerrit-Owner: Daniel Carvalho <[email protected]>
Gerrit-MessageType: newchange
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