Giacomo Travaglini has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/12946 )
Change subject: dev-arm: Implement GICv2 GICD_IGROUPR register
......................................................................
dev-arm: Implement GICv2 GICD_IGROUPR register
This patch is implementing GICD_IGROUPR register.
Change-Id: I1626f61fbf7deec9c81d8d2c135f1d6c0c4eb891
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/12946
Reviewed-by: Andreas Sandberg <[email protected]>
Maintainer: Andreas Sandberg <[email protected]>
---
M src/dev/arm/gic_v2.cc
M src/dev/arm/gic_v2.hh
2 files changed, 31 insertions(+), 3 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
diff --git a/src/dev/arm/gic_v2.cc b/src/dev/arm/gic_v2.cc
index 92949a3..01358b7 100644
--- a/src/dev/arm/gic_v2.cc
+++ b/src/dev/arm/gic_v2.cc
@@ -161,7 +161,9 @@
GicV2::readDistributor(ContextID ctx, Addr daddr, size_t resp_sz)
{
if (GICD_IGROUPR.contains(daddr)) {
- return 0; // unimplemented; RAZ (read as zero)
+ uint32_t ix = (daddr - GICD_IGROUPR.start()) >> 2;
+ assert(ix < 32);
+ return getIntGroup(ctx, ix);
}
if (GICD_ISENABLER.contains(daddr)) {
@@ -415,7 +417,10 @@
size_t data_sz)
{
if (GICD_IGROUPR.contains(daddr)) {
- return; // unimplemented; WI (writes ignored)
+ uint32_t ix = (daddr - GICD_IGROUPR.start()) >> 2;
+ assert(ix < 32);
+ getIntGroup(ctx, ix) |= data;
+ return;
}
if (GICD_ISENABLER.contains(daddr)) {
@@ -938,6 +943,7 @@
SERIALIZE_ARRAY(intEnabled, INT_BITS_MAX-1);
SERIALIZE_ARRAY(pendingInt, INT_BITS_MAX-1);
SERIALIZE_ARRAY(activeInt, INT_BITS_MAX-1);
+ SERIALIZE_ARRAY(intGroup, INT_BITS_MAX-1);
SERIALIZE_ARRAY(iccrpr, CPU_MAX);
SERIALIZE_ARRAY(intPriority, GLOBAL_INT_LINES);
SERIALIZE_ARRAY(cpuTarget, GLOBAL_INT_LINES);
@@ -967,6 +973,7 @@
SERIALIZE_SCALAR(intEnabled);
SERIALIZE_SCALAR(pendingInt);
SERIALIZE_SCALAR(activeInt);
+ SERIALIZE_SCALAR(intGroup);
SERIALIZE_ARRAY(intPriority, SGI_MAX + PPI_MAX);
}
@@ -980,6 +987,7 @@
UNSERIALIZE_ARRAY(intEnabled, INT_BITS_MAX-1);
UNSERIALIZE_ARRAY(pendingInt, INT_BITS_MAX-1);
UNSERIALIZE_ARRAY(activeInt, INT_BITS_MAX-1);
+ UNSERIALIZE_ARRAY(intGroup, INT_BITS_MAX-1);
UNSERIALIZE_ARRAY(iccrpr, CPU_MAX);
UNSERIALIZE_ARRAY(intPriority, GLOBAL_INT_LINES);
UNSERIALIZE_ARRAY(cpuTarget, GLOBAL_INT_LINES);
@@ -1024,6 +1032,7 @@
UNSERIALIZE_SCALAR(intEnabled);
UNSERIALIZE_SCALAR(pendingInt);
UNSERIALIZE_SCALAR(activeInt);
+ UNSERIALIZE_SCALAR(intGroup);
UNSERIALIZE_ARRAY(intPriority, SGI_MAX + PPI_MAX);
}
diff --git a/src/dev/arm/gic_v2.hh b/src/dev/arm/gic_v2.hh
index 2057e7d..4ca2f38 100644
--- a/src/dev/arm/gic_v2.hh
+++ b/src/dev/arm/gic_v2.hh
@@ -194,6 +194,10 @@
* interrupt active bits for first 32 interrupts, 1b per interrupt
*/
uint32_t activeInt;
+ /** GICD_IGROUPR0
+ * interrupt group bits for first 32 interrupts, 1b per interrupt
*/
+ uint32_t intGroup;
+
/** GICD_IPRIORITYR{0..7}
* interrupt priority for SGIs and PPIs */
uint8_t intPriority[SGI_MAX + PPI_MAX];
@@ -202,7 +206,8 @@
void unserialize(CheckpointIn &cp) override;
BankedRegs() :
- intEnabled(0), pendingInt(0), activeInt(0), intPriority {0}
+ intEnabled(0), pendingInt(0), activeInt(0),
+ intGroup(0), intPriority {0}
{}
};
std::vector<BankedRegs*> bankedRegs;
@@ -250,6 +255,20 @@
}
}
+ /** GICD_IGROUPR{1..31}
+ * interrupt group bits for global interrupts
+ * 1b per interrupt, 32 bits per word, 31 words */
+ uint32_t intGroup[INT_BITS_MAX-1];
+
+ uint32_t& getIntGroup(ContextID ctx, uint32_t ix) {
+ assert(ix < INT_BITS_MAX);
+ if (ix == 0) {
+ return getBankedRegs(ctx).intGroup;
+ } else {
+ return intGroup[ix - 1];
+ }
+ }
+
/** read only running priority register, 1 per cpu*/
uint32_t iccrpr[CPU_MAX];
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12946
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I1626f61fbf7deec9c81d8d2c135f1d6c0c4eb891
Gerrit-Change-Number: 12946
Gerrit-PatchSet: 4
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Ciro Santilli <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Nikos Nikoleris <[email protected]>
Gerrit-MessageType: merged
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
