Hi gem5 Devs, I've posted a set of patches that add support for some basic write-streaming optimizations in the cache (classic memory). The basic idea is that once we've detected write-streaming behavior 1) we can coalesce multiple WriteReq into full WriteLineReq to avoid fetching blocks from memory that we will overwrite, and 2) if we have enough confidence we can also bypass allocation in the data cache to avoid trashing.
The changes are on gerrit for a couple of weeks now and they have had some reviews (thanks Daniel!). I am planning to submit them next week unless any of you need more time. You can find the relevant changes here: https://gem5-review.googlesource.com/q/topic:%22write-streaming%22+(status:open%20OR%20status:merged) Thanks, Nikos IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
