Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/13461
Change subject: arch: Explicitly specify the endianness in the generic mem
helpers.
......................................................................
arch: Explicitly specify the endianness in the generic mem helpers.
This avoids using the accessors which automatically assume an
endianness, requiring the memory system to know what the guest ISA is.
Change-Id: I863fa4116f00e77b801a2f8ea2fbe34e7f55fd5f
---
M src/arch/generic/memhelpers.hh
M src/arch/generic/mmapped_ipr.cc
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/arch/generic/memhelpers.hh b/src/arch/generic/memhelpers.hh
index 6fe1707..7fd4f70 100644
--- a/src/arch/generic/memhelpers.hh
+++ b/src/arch/generic/memhelpers.hh
@@ -66,7 +66,7 @@
void
getMem(PacketPtr pkt, MemT &mem, Trace::InstRecord *traceData)
{
- mem = pkt->get<MemT>();
+ mem = pkt->get<MemT>(TheISA::GuestByteOrder);
if (traceData)
traceData->setData(mem);
}
diff --git a/src/arch/generic/mmapped_ipr.cc
b/src/arch/generic/mmapped_ipr.cc
index c908eff..14e2baf 100644
--- a/src/arch/generic/mmapped_ipr.cc
+++ b/src/arch/generic/mmapped_ipr.cc
@@ -47,7 +47,7 @@
assert((offset >> 16) == 0);
ret = PseudoInst::pseudoInst(xc, func, subfunc);
if (pkt->isRead())
- pkt->set(ret);
+ pkt->set(ret, TheISA::GuestByteOrder);
}
Cycles
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I863fa4116f00e77b801a2f8ea2fbe34e7f55fd5f
Gerrit-Change-Number: 13461
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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