Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/13616
Change subject: sparc: Switch the FloatReg and FloatRegBits types to be 64
bit.
......................................................................
sparc: Switch the FloatReg and FloatRegBits types to be 64 bit.
These types aren't used by the ISA itself since they're defined to be
particular primitive types in the ISA description. This just affects
code outside of the ISA which work with those types of registers.
Change-Id: I4f62ab8fe04184cc23845090c82b250145a71747
---
M src/arch/sparc/registers.hh
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/arch/sparc/registers.hh b/src/arch/sparc/registers.hh
index a7f4d2a..b5acaef 100644
--- a/src/arch/sparc/registers.hh
+++ b/src/arch/sparc/registers.hh
@@ -47,8 +47,8 @@
typedef uint64_t IntReg;
typedef uint64_t MiscReg;
-typedef float FloatReg;
-typedef uint32_t FloatRegBits;
+typedef double FloatReg;
+typedef uint64_t FloatRegBits;
// dummy typedef since we don't have CC regs
typedef uint8_t CCReg;
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/13616
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I4f62ab8fe04184cc23845090c82b250145a71747
Gerrit-Change-Number: 13616
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
