Hello Gabe Black, Tuan Ta, Jason Lowe-Power, Robert Scheffel,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/14377
to look at the new patch set (#2).
Change subject: arch-riscv: Add interrupt handling
......................................................................
arch-riscv: Add interrupt handling
Implement the Interrupts SimObject for RISC-V. This basically just
handles setting and getting the values of the interrupt-pending and
interrupt-enable CSRs according to the privileged ISA reference chapter
3.1.14. Note that it does NOT implement the PLIC as defined in chapter
7, as that is used for handling external interrupts which are defined
based on peripherals that are available.
Change-Id: Ia1321430f870ff5a3950217266fde0511332485b
---
M src/arch/riscv/faults.cc
M src/arch/riscv/faults.hh
M src/arch/riscv/interrupts.hh
M src/arch/riscv/isa.cc
M src/arch/riscv/isa/formats/standard.isa
5 files changed, 146 insertions(+), 47 deletions(-)
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ia1321430f870ff5a3950217266fde0511332485b
Gerrit-Change-Number: 14377
Gerrit-PatchSet: 2
Gerrit-Owner: Alec Roelke <[email protected]>
Gerrit-Reviewer: Alec Roelke <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-Reviewer: Robert Scheffel <[email protected]>
Gerrit-Reviewer: Tuan Ta <[email protected]>
Gerrit-MessageType: newpatchset
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