Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/14459
Change subject: base: arch: Get rid of the now unused FloatRegVal type.
......................................................................
base: arch: Get rid of the now unused FloatRegVal type.
This type is no longer used since FP registers are accessed as integer
bit patterns.
Change-Id: I1070f9443d6247165fd64c6bc041811c28287e9f
---
M src/arch/alpha/registers.hh
M src/arch/mips/registers.hh
M src/arch/null/registers.hh
M src/arch/power/registers.hh
M src/arch/riscv/registers.hh
M src/arch/x86/registers.hh
M src/base/types.hh
7 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/src/arch/alpha/registers.hh b/src/arch/alpha/registers.hh
index 2bff11b..6c71320 100644
--- a/src/arch/alpha/registers.hh
+++ b/src/arch/alpha/registers.hh
@@ -48,7 +48,6 @@
typedef RegVal IntReg;
// floating point register file entry type
-typedef FloatRegVal FloatReg;
typedef RegVal FloatRegBits;
// control register file contents
diff --git a/src/arch/mips/registers.hh b/src/arch/mips/registers.hh
index d2095d8..6f7097b 100644
--- a/src/arch/mips/registers.hh
+++ b/src/arch/mips/registers.hh
@@ -282,7 +282,6 @@
// floating point register file entry type
typedef RegVal FloatRegBits;
-typedef FloatRegVal FloatReg;
// cop-0/cop-1 system control register
typedef RegVal MiscReg;
diff --git a/src/arch/null/registers.hh b/src/arch/null/registers.hh
index 527193c..fb815af 100644
--- a/src/arch/null/registers.hh
+++ b/src/arch/null/registers.hh
@@ -48,7 +48,6 @@
typedef RegVal IntReg;
typedef RegVal FloatRegBits;
-typedef FloatRegVal FloatReg;
typedef uint8_t CCReg;
typedef RegVal MiscReg;
const RegIndex ZeroReg = 0;
diff --git a/src/arch/power/registers.hh b/src/arch/power/registers.hh
index 39f7d34..989b4c5 100644
--- a/src/arch/power/registers.hh
+++ b/src/arch/power/registers.hh
@@ -49,7 +49,6 @@
// Floating point register file entry type
typedef RegVal FloatRegBits;
-typedef FloatRegVal FloatReg;
typedef RegVal MiscReg;
// dummy typedef since we don't have CC regs
diff --git a/src/arch/riscv/registers.hh b/src/arch/riscv/registers.hh
index 75f74ef..2de154e 100644
--- a/src/arch/riscv/registers.hh
+++ b/src/arch/riscv/registers.hh
@@ -65,7 +65,6 @@
typedef RegVal IntReg;
typedef RegVal FloatRegBits;
-typedef FloatRegVal FloatReg;
typedef uint8_t CCReg; // Not applicable to Riscv
typedef RegVal MiscReg;
diff --git a/src/arch/x86/registers.hh b/src/arch/x86/registers.hh
index a2a74cc..509f7a1 100644
--- a/src/arch/x86/registers.hh
+++ b/src/arch/x86/registers.hh
@@ -105,7 +105,6 @@
//These floating point types are correct for mmx, but not
//technically for x87 (80 bits) or at all for xmm (128 bits)
-typedef FloatRegVal FloatReg;
typedef RegVal FloatRegBits;
} // namespace X86ISA
diff --git a/src/base/types.hh b/src/base/types.hh
index c02a606..d993845 100644
--- a/src/base/types.hh
+++ b/src/base/types.hh
@@ -166,7 +166,6 @@
const Addr MaxAddr = (Addr)-1;
typedef uint64_t RegVal;
-typedef double FloatRegVal;
static inline uint32_t
floatToBits32(float val)
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/14459
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I1070f9443d6247165fd64c6bc041811c28287e9f
Gerrit-Change-Number: 14459
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabebl...@google.com>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list
gem5-dev@gem5.org
http://m5sim.org/mailman/listinfo/gem5-dev