Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/15436 )

Change subject: arch-arm, sim-se: Fix incorrect SP handling in clone
......................................................................

arch-arm, sim-se: Fix incorrect SP handling in clone

The clone syscall is currently broken on aarch64 since the aarch64
code uses an incorrect SP register. Fix this by storing the new stack
pointer in SP_EL0 instead of R13.

Change-Id: Ie17990b4f359608e3b53e5bf625eca53769a6653
Signed-off-by: Andreas Sandberg <[email protected]>
Cc: Giacomo Travaglini <[email protected]>
Cc: Javier Setoain <[email protected]>
Cc: Brandon Potter <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/15436
Reviewed-by: Jason Lowe-Power <[email protected]>
Maintainer: Brandon Potter <[email protected]>
---
M src/arch/arm/linux/linux.hh
1 file changed, 23 insertions(+), 3 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved
  Brandon Potter: Looks good to me, approved



diff --git a/src/arch/arm/linux/linux.hh b/src/arch/arm/linux/linux.hh
index 9e9ca1f..e1f27a7 100644
--- a/src/arch/arm/linux/linux.hh
+++ b/src/arch/arm/linux/linux.hh
@@ -58,9 +58,6 @@
               uint64_t stack, uint64_t tls)
     {
         ArmISA::copyRegs(ptc, ctc);
-
-        if (stack)
-            ctc->setIntReg(TheISA::StackPointerReg, stack);
     }
 };

@@ -271,6 +268,18 @@
         int32_t tms_cutime;     //!< user time of children
         int32_t tms_cstime;     //!< system time of children
     };
+
+    static void
+    archClone(uint64_t flags,
+              Process *pp, Process *cp,
+              ThreadContext *ptc, ThreadContext *ctc,
+              uint64_t stack, uint64_t tls)
+    {
+        ArmLinux::archClone(flags, pp, cp, ptc, ctc, stack, tls);
+
+        if (stack)
+            ctc->setIntReg(ArmISA::INTREG_SP, stack);
+    }
 };

 class ArmLinux64 : public ArmLinux
@@ -516,6 +525,17 @@
         int64_t tms_cutime;     //!< user time of children
         int64_t tms_cstime;     //!< system time of children
     };
+
+    static void archClone(uint64_t flags,
+                          Process *pp, Process *cp,
+                          ThreadContext *ptc, ThreadContext *ctc,
+                          uint64_t stack, uint64_t tls)
+    {
+        ArmLinux::archClone(flags, pp, cp, ptc, ctc, stack, tls);
+
+        if (stack)
+            ctc->setIntReg(ArmISA::INTREG_SP0, stack);
+    }
 };

 #endif

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15436
To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings

Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ie17990b4f359608e3b53e5bf625eca53769a6653
Gerrit-Change-Number: 15436
Gerrit-PatchSet: 3
Gerrit-Owner: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Brandon Potter <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-CC: Giacomo Travaglini <[email protected]>
Gerrit-MessageType: merged
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to