Hi Mr.Gutierrez Thank you for your time. If suppose i wanted to implement the same *gpu-hello *in the HSAIL ISA , the command would simply be : *./build/HSAIL_X86/gem5.opt configs/example/apu_se.py -c tests/test-progs/gpu-hello/bin**/x86/linux/gpu-hello*
This should work right ? However i get the following error : *$:/scratch/gems/gem5$ ./build/HSAIL_X86/gem5.opt configs/example/apu_se.py -c tests/test-progs/gpu-hello/bin/x86/linux/gpu-hellogem5 Simulator System. http://gem5.org <http://gem5.org>gem5 is copyrighted software; use the --copyright option for details.gem5 compiled Jan 28 2019 15:33:10gem5 started Jan 28 2019 16:08:11gem5 executing on eelnx221, pid 29093command line: ./build/HSAIL_X86/gem5.opt configs/example/apu_se.py -c tests/test-progs/gpu-hello/bin/x86/linux/gpu-helloUsing GPU kernel code file(s) ./tests/test-progs/gpu-hello/bin/x86/linux/gpu-hello-kernel.asmGlobal frequency set at 1000000000000 ticks per secondwarn: system.ruby.network adopting orphan SimObject param 'int_links'warn: system.ruby.network adopting orphan SimObject param 'ext_links'warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (512 Mbytes)Forcing maxCoalescedReqs to 32 (TLB assoc.) Forcing maxCoalescedReqs to 32 (TLB assoc.) Forcing maxCoalescedReqs to 32 (TLB assoc.) Forcing maxCoalescedReqs to 32 (TLB assoc.) Forcing maxCoalescedReqs to 32 (TLB assoc.) 0: system.remote_gdb: listening for remote gdb on port 7000info: Entering event queue @ 0. Starting simulation...warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!keys = 0x7b2bc0, &keys = 0x798998, keys[0] = 23gem5.opt: build/HSAIL_X86/gpu-compute/gpu_tlb.cc:1547: virtual void X86ISA::GpuTLB::CpuSidePort::recvFunctional(PacketPtr): Assertion `success' failed.Program aborted at tick 589981000--- BEGIN LIBC BACKTRACE ---./build/HSAIL_X86/gem5.opt(_Z15print_backtracev+0x28)[0xd921d8]./build/HSAIL_X86/gem5.opt(_Z12abortHandleri+0x46)[0xda4d26]/lib/x86_64-linux-gnu/libpthread.so.0(+0x11390)[0x7f4495430390]/lib/x86_64-linux-gnu/libc.so.6(gsignal+0x38)[0x7f4493f31428]/lib/x86_64-linux-gnu/libc.so.6(abort+0x16a)[0x7f4493f3302a]/lib/x86_64-linux-gnu/libc.so.6(+0x2dbd7)[0x7f4493f29bd7]/lib/x86_64-linux-gnu/libc.so.6(+0x2dc82)[0x7f4493f29c82]./build/HSAIL_X86/gem5.opt(_ZN6X86ISA6GpuTLB11CpuSidePort14recvFunctionalEP6Packet+0x2e4)[0xecd6f4]./build/HSAIL_X86/gem5.opt(_ZN12TLBCoalescer11CpuSidePort14recvFunctionalEP6Packet+0xda)[0xedd21a]./build/HSAIL_X86/gem5.opt(_ZN6X86ISA6GpuTLB11CpuSidePort14recvFunctionalEP6Packet+0x4fa)[0xecd90a]./build/HSAIL_X86/gem5.opt(_ZN12TLBCoalescer11CpuSidePort14recvFunctionalEP6Packet+0xda)[0xedd21a]./build/HSAIL_X86/gem5.opt(_ZN6X86ISA6GpuTLB11CpuSidePort14recvFunctionalEP6Packet+0x4fa)[0xecd90a]./build/HSAIL_X86/gem5.opt(_ZN12TLBCoalescer11CpuSidePort14recvFunctionalEP6Packet+0xda)[0xedd21a]./build/HSAIL_X86/gem5.opt(_ZN6Shader19functionalTLBAccessEP6PacketiN7BaseTLB4ModeE+0xbe)[0xed72be]./build/HSAIL_X86/gem5.opt(_ZN6Shader18doFunctionalAccessEP7Request6MemCmdPvbi+0x9a7)[0xed7d97]./build/HSAIL_X86/gem5.opt(_ZN6Shader9AccessMemEmPvji6MemCmdb+0x188)[0xed8368]./build/HSAIL_X86/gem5.opt(_ZN6Shader7ReadMemEmPvji+0x11)[0xed8401]./build/HSAIL_X86/gem5.opt(_ZN13GpuDispatcher5writeEP6Packet+0xda1)[0xeb5351]./build/HSAIL_X86/gem5.opt(_ZN7PioPort10recvAtomicEP6Packet+0x6e)[0x1acd39e]./build/HSAIL_X86/gem5.opt(_ZN16SimpleTimingPort13recvTimingReqEP6Packet+0x48)[0x1a58be8]./build/HSAIL_X86/gem5.opt(_ZN15NoncoherentXBar13recvTimingReqEP6Packets+0x38a)[0x1a3a3aa]./build/HSAIL_X86/gem5.opt[0x1a49232]./build/HSAIL_X86/gem5.opt(_ZN10EventQueue10serviceOneEv+0xc5)[0xd989c5]./build/HSAIL_X86/gem5.opt(_Z9doSimLoopP10EventQueue+0x50)[0xdb0a20]./build/HSAIL_X86/gem5.opt(_Z8simulatem+0xd1b)[0xdb1b0b]./build/HSAIL_X86/gem5.opt[0x1c1532a]./build/HSAIL_X86/gem5.opt[0xdf4a55]/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x7852)[0x7f44956ed7b2]/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x85c)[0x7f449582411c]/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6ffd)[0x7f44956ecf5d]/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x85c)[0x7f449582411c]/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCode+0x19)[0x7f44956e5de9]--- END LIBC BACKTRACE ---Aborted (core dumped)* Is there anything i am missing or doing wrong? Also if i understand correctly , you're saying we can compile for GCN3_X86 but no "example application is provided with gem5" ? Can i try out the example applications ( https://github.com/ROCm-Developer-Tools/HCC-Example-Application ) linked on gem5.org Main Page to use *HCC and compile to GCN3_X86 *? Would they work on gem5 ? Thank you for your time Best, Krishna Subramanian On Mon, Jan 28, 2019 at 12:53 PM Gutierrez, Anthony < [email protected]> wrote: > That benchmark was for HSAIL ISA, and therefore doesn't run with the GCN3 > ISA. > > I removed that test from our repo ( > https://gem5.googlesource.com/amd/gem5/+/b021dd69fef50a0ccd8883d65225af9ff8bb6682). > Currently we provide no benchmarks that run out of the box on the APU model. > > Tony > > -----Original Message----- > From: gem5-dev <[email protected]> On Behalf Of Krishna > Subramanian > Sent: Friday, January 25, 2019 1:41 PM > To: [email protected] > Subject: [gem5-dev] Running AMD GPU > > Hi > > I am trying to run the GCN3 in gem5 as mentioned in the gem5 webpage. I > have built it successfully. However when i try to run a program *GPU-Hello* > using the command > > ./build/GCN3_X86/gem5.opt configs/example/apu_se.py -c > tests/test-progs/gpu-hello/bin/x86/lnux/gpu-hello > > It starts the execution and then shows an error *Failed to open /dev/hsa. > * No traceback , nothing. > > Your help is appreciated. > Best > Krishna Subramanian > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
