Hello Ciro Santilli,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/16205
to review the following change.
Change subject: configs: Unifiy interpretation of Realview mem_regions
......................................................................
configs: Unifiy interpretation of Realview mem_regions
In every arm platform which is making use of them, mem_regions are
interpreted as a pair of start address and size. However arm
SimpleSystem, which is using VExpress_GEM5_V1, is interpreting them as
start address and end address. This patch is fixing this mismatch.
Change-Id: I0b2a2193cd07fbc5430f233438269a9c7c353df9
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-by: Ciro Santilli <[email protected]>
---
M configs/example/arm/devices.py
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/configs/example/arm/devices.py b/configs/example/arm/devices.py
index 15492cb..e2c8be8 100644
--- a/configs/example/arm/devices.py
+++ b/configs/example/arm/devices.py
@@ -207,8 +207,8 @@
self.iobridge = Bridge(delay='50ns')
# Device DMA -> MEM
mem_range = self.realview._mem_regions[0]
- mem_range_size = long(mem_range[1]) - long(mem_range[0])
- assert mem_range_size >= long(Addr(mem_size))
+ max_size = long(mem_range[1])
+ assert max_size >= long(Addr(mem_size))
self.mem_ranges = [ AddrRange(start=mem_range[0], size=mem_size) ]
self._caches = caches
if self._caches:
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I0b2a2193cd07fbc5430f233438269a9c7c353df9
Gerrit-Change-Number: 16205
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Ciro Santilli <[email protected]>
Gerrit-MessageType: newchange
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