Tuan Ta has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/9622 )
Change subject: arch-riscv: initialize RISC-V's thread pointer register in
clone syscall
......................................................................
arch-riscv: initialize RISC-V's thread pointer register in clone syscall
This patch initializes thread pointer register to Thread Local Storage
(TLS)'s pointer given to a clone system call.
Change-Id: I03e2cf4763e6a0ed31f357772a513a05e1e3461b
Reviewed-on: https://gem5-review.googlesource.com/c/9622
Reviewed-by: Brandon Potter <brandon.pot...@amd.com>
Maintainer: Brandon Potter <brandon.pot...@amd.com>
---
M src/arch/riscv/linux/linux.hh
1 file changed, 2 insertions(+), 0 deletions(-)
Approvals:
Brandon Potter: Looks good to me, approved; Looks good to me, approved
diff --git a/src/arch/riscv/linux/linux.hh b/src/arch/riscv/linux/linux.hh
index 23b4fd5..441550a 100644
--- a/src/arch/riscv/linux/linux.hh
+++ b/src/arch/riscv/linux/linux.hh
@@ -196,6 +196,8 @@
uint64_t stack, uint64_t tls)
{
RiscvISA::copyRegs(ptc, ctc);
+ if (flags & TGT_CLONE_SETTLS)
+ ctc->setIntReg(RiscvISA::ThreadPointerReg, tls);
if (stack)
ctc->setIntReg(RiscvISA::StackPointerReg, stack);
}
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I03e2cf4763e6a0ed31f357772a513a05e1e3461b
Gerrit-Change-Number: 9622
Gerrit-PatchSet: 9
Gerrit-Owner: Tuan Ta <q...@cornell.edu>
Gerrit-Reviewer: Alec Roelke <ar...@virginia.edu>
Gerrit-Reviewer: Brandon Potter <brandon.pot...@amd.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: Tuan Ta <q...@cornell.edu>
Gerrit-MessageType: merged
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