Sandipan Das has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/16641
Change subject: arch-power: Fix stack layout for 64-bit execution
......................................................................
arch-power: Fix stack layout for 64-bit execution
This fixes the call stack layout by changing the size of the
auxiliary vector entries, each of which contain two 64-bit
values. Also, all base addresses for stack contents are now
considered to be 64 bits in order to prevent underflows during
program execution.
Users can now run statically-linked 64-bit ELF ABI v2 compliant
PowerPC LSB ELF executables in syscall emulation mode.
Change-Id: I256399d9344b1b101385e32ad8978325aec9844e
Signed-off-by: Sandipan Das <[email protected]>
---
M src/arch/power/isa_traits.hh
M src/arch/power/process.cc
2 files changed, 44 insertions(+), 15 deletions(-)
diff --git a/src/arch/power/isa_traits.hh b/src/arch/power/isa_traits.hh
index 99f76ff..4f84ac3 100644
--- a/src/arch/power/isa_traits.hh
+++ b/src/arch/power/isa_traits.hh
@@ -58,7 +58,7 @@
const Addr NPtePage = ULL(1) << NPtePageShift;
const Addr PteMask = NPtePage - 1;
-const int MachineBytes = 4;
+const int MachineBytes = 8;
// Memory accesses can be unaligned
const bool HasUnalignedMemAcc = true;
diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc
index ee72ba7..5301846 100644
--- a/src/arch/power/process.cc
+++ b/src/arch/power/process.cc
@@ -85,7 +85,7 @@
void
PowerProcess::argsInit(int intSize, int pageSize)
{
- typedef AuxVector<uint32_t> auxv_t;
+ typedef AuxVector<uint64_t> auxv_t;
std::vector<auxv_t> auxv;
string filename;
@@ -103,11 +103,37 @@
// load object file into target memory
objFile->loadSections(initVirtMem);
+ enum PowerCpuFeature {
+ Power_32 = ULL(1) << 31, // Always set for powerpc64
+ Power_64 = ULL(1) << 30, // Always set for powerpc64
+ Power_HAS_ALTIVEC = ULL(1) << 28,
+ Power_HAS_FPU = ULL(1) << 27,
+ Power_HAS_MMU = ULL(1) << 26,
+ Power_UNIFIED_CACHE = ULL(1) << 24,
+ Power_NO_TB = ULL(1) << 20, // 601/403gx have no timebase
+ Power_POWER4 = ULL(1) << 19, // POWER4 ISA 2.00
+ Power_POWER5 = ULL(1) << 18, // POWER5 ISA 2.02
+ Power_POWER5_PLUS = ULL(1) << 17, // POWER5+ ISA 2.03
+ Power_CELL_BE = ULL(1) << 16, // CELL Broadband Engine
+ Power_BOOKE = ULL(1) << 15, // ISA Category Embedded
+ Power_SMT = ULL(1) << 14, // Simultaneous Multi-Threading
+ Power_ICACHE_SNOOP = ULL(1) << 13,
+ Power_ARCH_2_05 = ULL(1) << 12, // ISA 2.05
+ Power_PA6T = ULL(1) << 11, // PA Semi 6T Core
+ Power_HAS_DFP = ULL(1) << 10, // Decimal FP Unit
+ Power_POWER6_EXT = ULL(1) << 9, // P6 + mffgpr/mftgpr
+ Power_ARCH_2_06 = ULL(1) << 8, // ISA 2.06
+ Power_HAS_VSX = ULL(1) << 7, // P7 Vector Extension
+ Power_PSERIES_PERFMON_COMPAT = ULL(1) << 6,
+ Power_TRUE_LE = ULL(1) << 1,
+ Power_PPC_LE = ULL(1) << 0
+ };
+
//Setup the auxilliary vectors. These will already have endian
conversion.
//Auxilliary vectors are loaded only for elf formatted executables.
ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
if (elfObject) {
- uint32_t features = 0;
+ uint64_t features = Power_32 | Power_64 | Power_PPC_LE;
//Bits which describe the system hardware capabilities
//XXX Figure out what these should be
@@ -142,6 +168,9 @@
auxv.push_back(auxv_t(M5_AT_EXECFN, 0));
//The string "v51" with unknown meaning
auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
+ //The address of 16 bytes in the data section containing a random
+ //value; it is required for stack protection using a canary value.
+ auxv.push_back(auxv_t(M5_AT_RANDOM, objFile->dataBase()));
}
//Figure out how big the initial stack nedes to be
@@ -205,15 +234,15 @@
roundUp(memState->getStackSize(), pageSize));
// map out initial stack contents
- uint32_t sentry_base = memState->getStackBase() - sentry_size;
- uint32_t aux_data_base = sentry_base - aux_data_size;
- uint32_t env_data_base = aux_data_base - env_data_size;
- uint32_t arg_data_base = env_data_base - arg_data_size;
- uint32_t platform_base = arg_data_base - platform_size;
- uint32_t auxv_array_base = platform_base - aux_array_size -
aux_padding;
- uint32_t envp_array_base = auxv_array_base - envp_array_size;
- uint32_t argv_array_base = envp_array_base - argv_array_size;
- uint32_t argc_base = argv_array_base - argc_size;
+ uint64_t sentry_base = memState->getStackBase() - sentry_size;
+ uint64_t aux_data_base = sentry_base - aux_data_size;
+ uint64_t env_data_base = aux_data_base - env_data_size;
+ uint64_t arg_data_base = env_data_base - arg_data_size;
+ uint64_t platform_base = arg_data_base - platform_size;
+ uint64_t auxv_array_base = platform_base - aux_array_size -
aux_padding;
+ uint64_t envp_array_base = auxv_array_base - envp_array_size;
+ uint64_t argv_array_base = envp_array_base - argv_array_size;
+ uint64_t argc_base = argv_array_base - argc_size;
DPRINTF(Stack, "The addresses of items on the initial stack:\n");
DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
@@ -229,11 +258,11 @@
// write contents to stack
// figure out argc
- uint32_t argc = argv.size();
- uint32_t guestArgc = PowerISA::htog(argc);
+ uint64_t argc = argv.size();
+ uint64_t guestArgc = PowerISA::htog(argc);
//Write out the sentry void *
- uint32_t sentry_NULL = 0;
+ uint64_t sentry_NULL = 0;
initVirtMem.writeBlob(sentry_base,
(uint8_t*)&sentry_NULL, sentry_size);
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I256399d9344b1b101385e32ad8978325aec9844e
Gerrit-Change-Number: 16641
Gerrit-PatchSet: 1
Gerrit-Owner: Sandipan Das <[email protected]>
Gerrit-MessageType: newchange
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