Giacomo Travaglini has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/16544 )
Change subject: dev-arm: Set ICV_IGRPEN<n>_EL1-ICH_VMCR_EL2 mapping on reads
......................................................................
dev-arm: Set ICV_IGRPEN<n>_EL1-ICH_VMCR_EL2 mapping on reads
Reading ICV_IGRPEN<n>_EL1 should return the value of VMCR_EL2.VENG0 and
VMCR_EL2.VENG1 bits.
Change-Id: Ia5d748cf60ba074cccf4c127ac479c5cb881773d
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-by: Jan-Peter Larsson <[email protected]>
Reviewed-by: Andreas Sandberg <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/16544
Maintainer: Andreas Sandberg <[email protected]>
---
M src/dev/arm/gic_v3_cpu_interface.cc
1 file changed, 16 insertions(+), 2 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
diff --git a/src/dev/arm/gic_v3_cpu_interface.cc
b/src/dev/arm/gic_v3_cpu_interface.cc
index 1beceac..f00a86a 100644
--- a/src/dev/arm/gic_v3_cpu_interface.cc
+++ b/src/dev/arm/gic_v3_cpu_interface.cc
@@ -151,21 +151,35 @@
case MISCREG_ICC_IGRPEN0:
case MISCREG_ICC_IGRPEN0_EL1: {
if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
- return isa->readMiscRegNoEffect(MISCREG_ICV_IGRPEN0_EL1);
+ return readMiscReg(MISCREG_ICV_IGRPEN0_EL1);
}
break;
}
+ case MISCREG_ICV_IGRPEN0_EL1: {
+ RegVal ich_vmcr_el2 =
+ isa->readMiscRegNoEffect(MISCREG_ICH_VMCR_EL2);
+ value = bits(ich_vmcr_el2, ICH_VMCR_EL2_VENG0_SHIFT);
+ break;
+ }
+
case MISCREG_ICC_IGRPEN1:
case MISCREG_ICC_IGRPEN1_EL1: {
if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
- return isa->readMiscRegNoEffect(MISCREG_ICV_IGRPEN1_EL1);
+ return readMiscReg(MISCREG_ICV_IGRPEN1_EL1);
}
break;
}
+ case MISCREG_ICV_IGRPEN1_EL1: {
+ RegVal ich_vmcr_el2 =
+ isa->readMiscRegNoEffect(MISCREG_ICH_VMCR_EL2);
+ value = bits(ich_vmcr_el2, ICH_VMCR_EL2_VENG1_SHIFT);
+ break;
+ }
+
case MISCREG_ICC_MGRPEN1:
case MISCREG_ICC_IGRPEN1_EL3: {
// EnableGrp1S and EnableGrp1NS are aliased with
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ia5d748cf60ba074cccf4c127ac479c5cb881773d
Gerrit-Change-Number: 16544
Gerrit-PatchSet: 3
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-MessageType: merged
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