Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18469

Change subject: sparc: Move the interrupt types out of isa_traits.hh into interrupts.hh.
......................................................................

sparc: Move the interrupt types out of isa_traits.hh into interrupts.hh.

Those types aren't generic or used outside of SPARC.

Change-Id: I9bb154920a9625f12388c3d295dc933ab51fadde
---
M src/arch/sparc/interrupts.hh
M src/arch/sparc/isa_traits.hh
M src/arch/sparc/tlb.cc
M src/arch/sparc/ua2005.cc
M src/dev/sparc/iob.cc
5 files changed, 15 insertions(+), 12 deletions(-)



diff --git a/src/arch/sparc/interrupts.hh b/src/arch/sparc/interrupts.hh
index e6c9266..abc899e 100644
--- a/src/arch/sparc/interrupts.hh
+++ b/src/arch/sparc/interrupts.hh
@@ -43,6 +43,18 @@
 namespace SparcISA
 {

+enum InterruptTypes
+{
+    IT_TRAP_LEVEL_ZERO,
+    IT_HINTP,
+    IT_INT_VEC,
+    IT_CPU_MONDO,
+    IT_DEV_MONDO,
+    IT_RES_ERROR,
+    IT_SOFT_INT,
+    NumInterruptTypes
+};
+
 class Interrupts : public SimObject
 {
   private:
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 58d8437..5bcfc04 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -61,18 +61,6 @@
 const Addr PAddrImplMask = ULL(0x000000FFFFFFFFFF);
 const Addr BytesInPageMask = ULL(0x1FFF);

-enum InterruptTypes
-{
-    IT_TRAP_LEVEL_ZERO,
-    IT_HINTP,
-    IT_INT_VEC,
-    IT_CPU_MONDO,
-    IT_DEV_MONDO,
-    IT_RES_ERROR,
-    IT_SOFT_INT,
-    NumInterruptTypes
-};
-
 // Memory accesses cannot be unaligned
 const bool HasUnalignedMemAcc = false;

diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index b2078dd..8564c43 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -34,6 +34,7 @@

 #include "arch/sparc/asi.hh"
 #include "arch/sparc/faults.hh"
+#include "arch/sparc/interrupts.hh"
 #include "arch/sparc/registers.hh"
 #include "base/bitfield.hh"
 #include "base/compiler.hh"
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index 4cafff4..389549b 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -26,6 +26,7 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */

+#include "arch/sparc/interrupts.hh"
 #include "arch/sparc/isa.hh"
 #include "arch/sparc/kernel_stats.hh"
 #include "arch/sparc/registers.hh"
diff --git a/src/dev/sparc/iob.cc b/src/dev/sparc/iob.cc
index f146536..1df6dec 100644
--- a/src/dev/sparc/iob.cc
+++ b/src/dev/sparc/iob.cc
@@ -40,6 +40,7 @@
 #include <cstring>

 #include "arch/sparc/faults.hh"
+#include "arch/sparc/interrupts.hh"
 #include "arch/sparc/isa_traits.hh"
 #include "base/bitfield.hh"
 #include "base/trace.hh"

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/18469
To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings

Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I9bb154920a9625f12388c3d295dc933ab51fadde
Gerrit-Change-Number: 18469
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to