Gabor Dozsa has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/18508
Change subject: x86: Mark translation as delayed in case of a hw page table
walk
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x86: Mark translation as delayed in case of a hw page table walk
This information is used by the LSQ in the O3 cpu (since commit
"51becd2... cpu-o3: O3 LSQ Generalisation")
Change-Id: I35fe7e2f8428641d863af0e79e28b0b259fb0b00
Signed-off-by: Gabor Dozsa <[email protected]>
---
M src/arch/x86/tlb.cc
1 file changed, 2 insertions(+), 0 deletions(-)
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 33de058..84965b8 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -443,6 +443,8 @@
TLB::translate(req, tc, translation, mode, delayedResponse, true);
if (!delayedResponse)
translation->finish(fault, req, tc, mode);
+ else
+ translation->markDelayed();
}
Walker *
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I35fe7e2f8428641d863af0e79e28b0b259fb0b00
Gerrit-Change-Number: 18508
Gerrit-PatchSet: 1
Gerrit-Owner: Gabor Dozsa <[email protected]>
Gerrit-MessageType: newchange
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